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Searched refs:SIM_SOPT2_SDHCSRC_MASK (Results 1 – 22 of 22) sorted by relevance

/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MK24F12/drivers/
Dfsl_clock.h704 SIM->SOPT2 = ((SIM->SOPT2 & ~SIM_SOPT2_SDHCSRC_MASK) | SIM_SOPT2_SDHCSRC(src)); in CLOCK_SetSdhc0Clock()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MK22F12/drivers/
Dfsl_clock.h670 SIM->SOPT2 = ((SIM->SOPT2 & ~SIM_SOPT2_SDHCSRC_MASK) | SIM_SOPT2_SDHCSRC(src)); in CLOCK_SetSdhc0Clock()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MK64F12/drivers/
Dfsl_clock.h702 SIM->SOPT2 = ((SIM->SOPT2 & ~SIM_SOPT2_SDHCSRC_MASK) | SIM_SOPT2_SDHCSRC(src)); in CLOCK_SetSdhc0Clock()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MK63F12/drivers/
Dfsl_clock.h702 SIM->SOPT2 = ((SIM->SOPT2 & ~SIM_SOPT2_SDHCSRC_MASK) | SIM_SOPT2_SDHCSRC(src)); in CLOCK_SetSdhc0Clock()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MK26F18/drivers/
Dfsl_clock.h753 SIM->SOPT2 = ((SIM->SOPT2 & ~SIM_SOPT2_SDHCSRC_MASK) | SIM_SOPT2_SDHCSRC(src)); in CLOCK_SetSdhc0Clock()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MK27FA15/drivers/
Dfsl_clock.h763 SIM->SOPT2 = ((SIM->SOPT2 & ~SIM_SOPT2_SDHCSRC_MASK) | SIM_SOPT2_SDHCSRC(src)); in CLOCK_SetSdhc0Clock()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MK80F25615/drivers/
Dfsl_clock.h727 SIM->SOPT2 = ((SIM->SOPT2 & ~SIM_SOPT2_SDHCSRC_MASK) | SIM_SOPT2_SDHCSRC(src)); in CLOCK_SetSdhc0Clock()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MK82F25615/drivers/
Dfsl_clock.h734 SIM->SOPT2 = ((SIM->SOPT2 & ~SIM_SOPT2_SDHCSRC_MASK) | SIM_SOPT2_SDHCSRC(src)); in CLOCK_SetSdhc0Clock()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MK28FA15/drivers/
Dfsl_clock.h763 SIM->SOPT2 = ((SIM->SOPT2 & ~SIM_SOPT2_SDHCSRC_MASK) | SIM_SOPT2_SDHCSRC(src)); in CLOCK_SetSdhc0Clock()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MK66F18/drivers/
Dfsl_clock.h759 SIM->SOPT2 = ((SIM->SOPT2 & ~SIM_SOPT2_SDHCSRC_MASK) | SIM_SOPT2_SDHCSRC(src)); in CLOCK_SetSdhc0Clock()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MK65F18/drivers/
Dfsl_clock.h760 SIM->SOPT2 = ((SIM->SOPT2 & ~SIM_SOPT2_SDHCSRC_MASK) | SIM_SOPT2_SDHCSRC(src)); in CLOCK_SetSdhc0Clock()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MK22F12/
DMK22F12.h15899 #define SIM_SOPT2_SDHCSRC_MASK (0x30000000U) macro
15907 … (((uint32_t)(((uint32_t)(x)) << SIM_SOPT2_SDHCSRC_SHIFT)) & SIM_SOPT2_SDHCSRC_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MK24F12/
DMK24F12.h19365 #define SIM_SOPT2_SDHCSRC_MASK (0x30000000U) macro
19373 … (((uint32_t)(((uint32_t)(x)) << SIM_SOPT2_SDHCSRC_SHIFT)) & SIM_SOPT2_SDHCSRC_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MK64F12/
DMK64F12.h21214 #define SIM_SOPT2_SDHCSRC_MASK (0x30000000U) macro
21222 … (((uint32_t)(((uint32_t)(x)) << SIM_SOPT2_SDHCSRC_SHIFT)) & SIM_SOPT2_SDHCSRC_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MK63F12/
DMK63F12.h21168 #define SIM_SOPT2_SDHCSRC_MASK (0x30000000U) macro
21176 … (((uint32_t)(((uint32_t)(x)) << SIM_SOPT2_SDHCSRC_SHIFT)) & SIM_SOPT2_SDHCSRC_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MK80F25615/
DMK80F25615.h21551 #define SIM_SOPT2_SDHCSRC_MASK (0x30000000U) macro
21559 … (((uint32_t)(((uint32_t)(x)) << SIM_SOPT2_SDHCSRC_SHIFT)) & SIM_SOPT2_SDHCSRC_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MK82F25615/
DMK82F25615.h22524 #define SIM_SOPT2_SDHCSRC_MASK (0x30000000U) macro
22532 … (((uint32_t)(((uint32_t)(x)) << SIM_SOPT2_SDHCSRC_SHIFT)) & SIM_SOPT2_SDHCSRC_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MK27FA15/
DMK27FA15.h21137 #define SIM_SOPT2_SDHCSRC_MASK (0x30000000U) macro
21145 … (((uint32_t)(((uint32_t)(x)) << SIM_SOPT2_SDHCSRC_SHIFT)) & SIM_SOPT2_SDHCSRC_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MK26F18/
DMK26F18.h23593 #define SIM_SOPT2_SDHCSRC_MASK (0x30000000U) macro
23601 … (((uint32_t)(((uint32_t)(x)) << SIM_SOPT2_SDHCSRC_SHIFT)) & SIM_SOPT2_SDHCSRC_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MK65F18/
DMK65F18.h25428 #define SIM_SOPT2_SDHCSRC_MASK (0x30000000U) macro
25436 … (((uint32_t)(((uint32_t)(x)) << SIM_SOPT2_SDHCSRC_SHIFT)) & SIM_SOPT2_SDHCSRC_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MK66F18/
DMK66F18.h25428 #define SIM_SOPT2_SDHCSRC_MASK (0x30000000U) macro
25436 … (((uint32_t)(((uint32_t)(x)) << SIM_SOPT2_SDHCSRC_SHIFT)) & SIM_SOPT2_SDHCSRC_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MK28FA15/
DMK28FA15.h21139 #define SIM_SOPT2_SDHCSRC_MASK (0x30000000U) macro
21147 … (((uint32_t)(((uint32_t)(x)) << SIM_SOPT2_SDHCSRC_SHIFT)) & SIM_SOPT2_SDHCSRC_MASK)