Searched refs:SIM_FCFG1_REG (Results 1 – 6 of 6) sorted by relevance
/hal_nxp-3.5.0/mcux/mcux-sdk/drivers/flash/ |
D | fsl_ftfx_adapter.h | 286 #define SIM_FCFG1_REG SIM->FCFG1 macro 290 #define SIM_FCFG1_REG SIM->FCFG1 macro 294 #define SIM_FCFG1_REG INVALID_REG_VALUE macro
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D | fsl_ftfx_flash.c | 1359 pfsize = (uint8_t)((SIM_FCFG1_REG & pfsizeMask) >> pfsizeShift); in flash_calculate_mem_size()
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKW40Z4/ |
D | MKW40Z4_extension.h | 20619 #define SIM_RD_FCFG1(base) (SIM_FCFG1_REG(base)) 20620 #define SIM_WR_FCFG1(base, value) (SIM_FCFG1_REG(base) = (value)) 20622 #define SIM_SET_FCFG1(base, value) (BME_OR32(&SIM_FCFG1_REG(base), (uint32_t)(value))) 20623 #define SIM_CLR_FCFG1(base, value) (BME_AND32(&SIM_FCFG1_REG(base), (uint32_t)(~(value)))) 20624 #define SIM_TOG_FCFG1(base, value) (BME_XOR32(&SIM_FCFG1_REG(base), (uint32_t)(value))) 20645 #define SIM_RD_FCFG1_FLASHDIS(base) ((SIM_FCFG1_REG(base) & SIM_FCFG1_FLASHDIS_MASK) >> SIM_FCFG1_F… 20646 #define SIM_BRD_FCFG1_FLASHDIS(base) (BME_UBFX32(&SIM_FCFG1_REG(base), SIM_FCFG1_FLASHDIS_SHIFT, SI… 20650 #define SIM_BWR_FCFG1_FLASHDIS(base, value) (BME_BFI32(&SIM_FCFG1_REG(base), ((uint32_t)(value) << … 20669 #define SIM_RD_FCFG1_FLASHDOZE(base) ((SIM_FCFG1_REG(base) & SIM_FCFG1_FLASHDOZE_MASK) >> SIM_FCFG1… 20670 #define SIM_BRD_FCFG1_FLASHDOZE(base) (BME_UBFX32(&SIM_FCFG1_REG(base), SIM_FCFG1_FLASHDOZE_SHIFT, … [all …]
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D | MKW40Z4.h | 6829 #define SIM_FCFG1_REG(base) ((base)->FCFG1) macro 7185 #define SIM_FCFG1 SIM_FCFG1_REG(SIM)
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKW20Z4/ |
D | MKW20Z4.h | 6829 #define SIM_FCFG1_REG(base) ((base)->FCFG1) macro 7185 #define SIM_FCFG1 SIM_FCFG1_REG(SIM)
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKW30Z4/ |
D | MKW30Z4.h | 6829 #define SIM_FCFG1_REG(base) ((base)->FCFG1) macro 7185 #define SIM_FCFG1 SIM_FCFG1_REG(SIM)
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