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Searched refs:SCG_SPLLDIV_SPLLDIV3_VAL (Results 1 – 4 of 4) sorted by relevance

/hal_nxp-3.5.0/mcux/mcux-sdk/devices/K32L2A41A/drivers/
Dfsl_clock.c63 #define SCG_SPLLDIV_SPLLDIV3_VAL ((SCG->SPLLDIV & SCG_SPLLDIV_SPLLDIV3_MASK) >> SCG_SPLLDIV_SPLLDIV… macro
1191 divider = SCG_SPLLDIV_SPLLDIV3_VAL; in CLOCK_GetSysPllAsyncFreq()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/K32L2A31A/drivers/
Dfsl_clock.c63 #define SCG_SPLLDIV_SPLLDIV3_VAL ((SCG->SPLLDIV & SCG_SPLLDIV_SPLLDIV3_MASK) >> SCG_SPLLDIV_SPLLDIV… macro
1191 divider = SCG_SPLLDIV_SPLLDIV3_VAL; in CLOCK_GetSysPllAsyncFreq()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MCIMX7U5/drivers/
Dfsl_clock.c76 #define SCG_SPLLDIV_SPLLDIV3_VAL ((SCG->SPLLDIV & SCG_SPLLDIV_SPLLDIV3_MASK) >> SCG_SPLLDIV_SPLLDIV… macro
1554 divider = SCG_SPLLDIV_SPLLDIV3_VAL; in CLOCK_GetSysPllAsyncFreq()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MCIMX7U3/drivers/
Dfsl_clock.c76 #define SCG_SPLLDIV_SPLLDIV3_VAL ((SCG->SPLLDIV & SCG_SPLLDIV_SPLLDIV3_MASK) >> SCG_SPLLDIV_SPLLDIV… macro
1554 divider = SCG_SPLLDIV_SPLLDIV3_VAL; in CLOCK_GetSysPllAsyncFreq()