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Searched refs:SCG_SOSCCSR_SOSCLPEN_MASK (Results 1 – 25 of 34) sorted by relevance

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/hal_nxp-3.5.0/mcux/mcux-sdk/boards/evkmcimx7ulp/project_template/
Dclock_config.c293 SCG0->SOSCCSR |= SCG_SOSCCSR_SOSCLPEN_MASK | SCG_SOSCCSR_SOSCSTEN_MASK; in BOARD_InitClock()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MCIMX7U3/project_template/
Dclock_config.c293 SCG0->SOSCCSR |= SCG_SOSCCSR_SOSCLPEN_MASK | SCG_SOSCCSR_SOSCSTEN_MASK; in BOARD_InitClock()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MCIMX7U5/project_template/
Dclock_config.c293 SCG0->SOSCCSR |= SCG_SOSCCSR_SOSCLPEN_MASK | SCG_SOSCCSR_SOSCSTEN_MASK; in BOARD_InitClock()
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/evkmcimx7ulp/
Dclock_config.c265 SCG0->SOSCCSR |= SCG_SOSCCSR_SOSCLPEN_MASK | SCG_SOSCCSR_SOSCSTEN_MASK; in BOARD_InitClock()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE15Z4/drivers/
Dfsl_clock.h372 kSCG_SysOscEnableInLowPower = SCG_SOSCCSR_SOSCLPEN_MASK, /*!< Enable OSC in low power mode. */
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE14Z4/drivers/
Dfsl_clock.h364 kSCG_SysOscEnableInLowPower = SCG_SOSCCSR_SOSCLPEN_MASK, /*!< Enable OSC in low power mode. */
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE16Z4/drivers/
Dfsl_clock.h376 kSCG_SysOscEnableInLowPower = SCG_SOSCCSR_SOSCLPEN_MASK, /*!< Enable OSC in low power mode. */
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE12Z7/drivers/
Dfsl_clock.h380 kSCG_SysOscEnableInLowPower = SCG_SOSCCSR_SOSCLPEN_MASK, /*!< Enable OSC in low power mode. */
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE13Z7/drivers/
Dfsl_clock.h387 kSCG_SysOscEnableInLowPower = SCG_SOSCCSR_SOSCLPEN_MASK, /*!< Enable OSC in low power mode. */
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE14Z7/drivers/
Dfsl_clock.h422 kSCG_SysOscEnableInLowPower = SCG_SOSCCSR_SOSCLPEN_MASK, /*!< Enable OSC in low power mode. */
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE17Z7/drivers/
Dfsl_clock.h388 kSCG_SysOscEnableInLowPower = SCG_SOSCCSR_SOSCLPEN_MASK, /*!< Enable OSC in low power mode. */
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE15Z7/drivers/
Dfsl_clock.h429 kSCG_SysOscEnableInLowPower = SCG_SOSCCSR_SOSCLPEN_MASK, /*!< Enable OSC in low power mode. */
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE14F16/drivers/
Dfsl_clock.h449 kSCG_SysOscEnableInLowPower = SCG_SOSCCSR_SOSCLPEN_MASK, /*!< Enable OSC in low power mode. */
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE18F16/drivers/
Dfsl_clock.h455 kSCG_SysOscEnableInLowPower = SCG_SOSCCSR_SOSCLPEN_MASK, /*!< Enable OSC in low power mode. */
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE16F16/drivers/
Dfsl_clock.h455 kSCG_SysOscEnableInLowPower = SCG_SOSCCSR_SOSCLPEN_MASK, /*!< Enable OSC in low power mode. */
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/K32L2A41A/drivers/
Dfsl_clock.h448 kSCG_SysOscEnableInLowPower = SCG_SOSCCSR_SOSCLPEN_MASK, /*!< Enable OSC in low power mode. */
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/K32L2A31A/drivers/
Dfsl_clock.h448 kSCG_SysOscEnableInLowPower = SCG_SOSCCSR_SOSCLPEN_MASK, /*!< Enable OSC in low power mode. */
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MCIMX7U3/drivers/
Dfsl_clock.h617 kSCG_SysOscEnableInLowPower = SCG_SOSCCSR_SOSCLPEN_MASK, /*!< Enable OSC in low power mode. */
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MCIMX7U5/drivers/
Dfsl_clock.h617 kSCG_SysOscEnableInLowPower = SCG_SOSCCSR_SOSCLPEN_MASK, /*!< Enable OSC in low power mode. */
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE14Z4/
DMKE14Z4.h9887 #define SCG_SOSCCSR_SOSCLPEN_MASK (0x4U) macro
9893 … (((uint32_t)(((uint32_t)(x)) << SCG_SOSCCSR_SOSCLPEN_SHIFT)) & SCG_SOSCCSR_SOSCLPEN_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE15Z4/
DMKE15Z4.h9889 #define SCG_SOSCCSR_SOSCLPEN_MASK (0x4U) macro
9895 … (((uint32_t)(((uint32_t)(x)) << SCG_SOSCCSR_SOSCLPEN_SHIFT)) & SCG_SOSCCSR_SOSCLPEN_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE12Z7/
DMKE12Z7.h12420 #define SCG_SOSCCSR_SOSCLPEN_MASK (0x4U) macro
12426 … (((uint32_t)(((uint32_t)(x)) << SCG_SOSCCSR_SOSCLPEN_SHIFT)) & SCG_SOSCCSR_SOSCLPEN_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE16Z4/
DMKE16Z4.h10726 #define SCG_SOSCCSR_SOSCLPEN_MASK (0x4U) macro
10732 … (((uint32_t)(((uint32_t)(x)) << SCG_SOSCCSR_SOSCLPEN_SHIFT)) & SCG_SOSCCSR_SOSCLPEN_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE13Z7/
DMKE13Z7.h12423 #define SCG_SOSCCSR_SOSCLPEN_MASK (0x4U) macro
12429 … (((uint32_t)(((uint32_t)(x)) << SCG_SOSCCSR_SOSCLPEN_SHIFT)) & SCG_SOSCCSR_SOSCLPEN_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE17Z7/
DMKE17Z7.h12426 #define SCG_SOSCCSR_SOSCLPEN_MASK (0x4U) macro
12432 … (((uint32_t)(((uint32_t)(x)) << SCG_SOSCCSR_SOSCLPEN_SHIFT)) & SCG_SOSCCSR_SOSCLPEN_MASK)

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