SCG_APLL_POSTDIV2_BASE_VALUE (reference) in projects: hal_nxp-3.5.0

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Searched refs:SCG_APLL_POSTDIV2_BASE_VALUE (Results 1 – 2 of 2) sorted by relevance

/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MCIMX7U5/drivers/
D	fsl_clock.c	`61 #define SCG_APLL_POSTDIV2_BASE_VALUE 1U macro 1231 … freq /= (SCG_APLLCFG_POSTDIV2_VAL + SCG_APLL_POSTDIV2_BASE_VALUE); /* Post-divider 2. */ in CLOCK_GetAuxPllFreq()`
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MCIMX7U3/drivers/
D	fsl_clock.c	`61 #define SCG_APLL_POSTDIV2_BASE_VALUE 1U macro 1231 … freq /= (SCG_APLLCFG_POSTDIV2_VAL + SCG_APLL_POSTDIV2_BASE_VALUE); /* Post-divider 2. */ in CLOCK_GetAuxPllFreq()`

TraceRecorderSource-2.7.6
TraceRecorderSource-3.4.0
Zephyr-Core-2.7.6
Zephyr-Core-3.4.0
Zephyr-Core-3.5.0
Zephyr-Core-3.6.0
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acpica-3.5.0
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babblesim_ext_2G4_device_playback-3.7.0
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