SCG_APLLDIV_APLLDIV1_VAL (reference) in projects: hal_nxp-3.5.0

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Searched refs:SCG_APLLDIV_APLLDIV1_VAL (Results 1 – 2 of 2) sorted by relevance

/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MCIMX7U5/drivers/
D	fsl_clock.c	`92 #define SCG_APLLDIV_APLLDIV1_VAL ((SCG->APLLDIV & SCG_APLLDIV_APLLDIV1_MASK) >> SCG_APLLDIV_APLLDIV… macro 1269 divider = SCG_APLLDIV_APLLDIV1_VAL; in CLOCK_GetAuxPllAsyncFreq()`
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MCIMX7U3/drivers/
D	fsl_clock.c	`92 #define SCG_APLLDIV_APLLDIV1_VAL ((SCG->APLLDIV & SCG_APLLDIV_APLLDIV1_MASK) >> SCG_APLLDIV_APLLDIV… macro 1269 divider = SCG_APLLDIV_APLLDIV1_VAL; in CLOCK_GetAuxPllAsyncFreq()`

TraceRecorderSource-2.7.6
TraceRecorderSource-3.4.0
Zephyr-Core-2.7.6
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Zephyr-Core-3.5.0
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