SCG_APLLCFG_POSTDIV1_VAL (reference) in projects: hal_nxp-3.5.0

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Searched refs:SCG_APLLCFG_POSTDIV1_VAL (Results 1 – 2 of 2) sorted by relevance

/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MCIMX7U5/drivers/
D	fsl_clock.c	`90 #define SCG_APLLCFG_POSTDIV1_VAL ((SCG->APLLCFG & SCG_APLLCFG_PLLPOSTDIV1_MASK) >> SCG_APLLCFG_PLLP… macro 1230 … freq /= (SCG_APLLCFG_POSTDIV1_VAL + SCG_APLL_POSTDIV1_BASE_VALUE); /* Post-divider 1. */ in CLOCK_GetAuxPllFreq()`
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MCIMX7U3/drivers/
D	fsl_clock.c	`90 #define SCG_APLLCFG_POSTDIV1_VAL ((SCG->APLLCFG & SCG_APLLCFG_PLLPOSTDIV1_MASK) >> SCG_APLLCFG_PLLP… macro 1230 … freq /= (SCG_APLLCFG_POSTDIV1_VAL + SCG_APLL_POSTDIV1_BASE_VALUE); /* Post-divider 1. */ in CLOCK_GetAuxPllFreq()`

TraceRecorderSource-2.7.6
TraceRecorderSource-3.4.0
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