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Searched refs:RW0PS (Results 1 – 4 of 4) sorted by relevance

/hal_nxp-3.5.0/mcux/middleware/wireless/framework_5.3.3/XCVR/MKW41Z4/cfgs_kw4x_3x_2x/
Dfsl_xcvr_ant_config.c66 .phy_pre_ref0_init = RW0PS(0, 0x1B) |
67 RW0PS(1, 0x1CU) |
68 RW0PS(2, 0x1CU) |
69 RW0PS(3, 0x1CU) |
70 RW0PS(4, 0x1DU) |
71 RW0PS(5, 0x1DU) |
72RW0PS(6, 0x1EU & 0x3U), /* Phase info #6 overlaps two initialization words - only need two lowest …
Dfsl_xcvr_ble_config.c62 .phy_pre_ref0_init = RW0PS(0, 0x19) |
63 RW0PS(1, 0x19U) |
64 RW0PS(2, 0x1AU) |
65 RW0PS(3, 0x1BU) |
66 RW0PS(4, 0x1CU) |
67 RW0PS(5, 0x1CU) |
68RW0PS(6, 0x1DU & 0x3U), /* Phase info #6 overlaps two initialization words */
Dfsl_xcvr_gfsk_bt_0p5_h_0p5_config.c61 .phy_pre_ref0_init = RW0PS(0, 0x19) |
62 RW0PS(1, 0x19U) |
63 RW0PS(2, 0x1AU) |
64 RW0PS(3, 0x1BU) |
65 RW0PS(4, 0x1CU) |
66 RW0PS(5, 0x1CU) |
67RW0PS(6, 0x1DU & 0x3U), /* Phase info #6 overlaps two initialization words */
/hal_nxp-3.5.0/mcux/middleware/wireless/framework_5.3.3/XCVR/MKW41Z4/
Dfsl_xcvr.h382 #define RW0PS(loc, val) (((val) & 0x1F) << ((loc) * 5)) /* Ref Word 0 - loc is the phase info … macro