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Searched refs:QuadSPI_TGMDAD_MIDMATCH_MASK (Results 1 – 2 of 2) sorted by relevance

/hal_nxp-3.5.0/s32/drivers/s32k3/Fls/include/
DQspi_Ip_HwAccess.h1194 RegValue &= ~QuadSPI_TGMDAD_MIDMATCH_MASK; in Qspi_Ip_Sfp_SetTgDomainIdMatch()
/hal_nxp-3.5.0/s32/drivers/s32ze/BaseNXP/header/
DS32Z2_QUADSPI.h1431 #define QuadSPI_TGMDAD_MIDMATCH_MASK (0x3FU) macro
1434 … (((uint32_t)(((uint32_t)(x)) << QuadSPI_TGMDAD_MIDMATCH_SHIFT)) & QuadSPI_TGMDAD_MIDMATCH_MASK)