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Searched refs:QuadSPI_DLLCRA_SLV_FINE_OFFSET_MASK (Results 1 – 3 of 3) sorted by relevance

/hal_nxp-3.5.0/s32/drivers/s32k3/BaseNXP/header/
DS32K344_QUADSPI.h343 #define QuadSPI_DLLCRA_SLV_FINE_OFFSET_MASK (0xF0000U) macro
346 …t)(((uint32_t)(x)) << QuadSPI_DLLCRA_SLV_FINE_OFFSET_SHIFT)) & QuadSPI_DLLCRA_SLV_FINE_OFFSET_MASK)
/hal_nxp-3.5.0/s32/drivers/s32k3/Fls/include/
DQspi_Ip_HwAccess.h433 RegValue &= (uint32)(~((uint32)QuadSPI_DLLCRA_SLV_FINE_OFFSET_MASK)); in Qspi_Ip_DLLSetFineOffsetA()
/hal_nxp-3.5.0/s32/drivers/s32ze/BaseNXP/header/
DS32Z2_QUADSPI.h503 #define QuadSPI_DLLCRA_SLV_FINE_OFFSET_MASK (0xF0000U) macro
506 …t)(((uint32_t)(x)) << QuadSPI_DLLCRA_SLV_FINE_OFFSET_SHIFT)) & QuadSPI_DLLCRA_SLV_FINE_OFFSET_MASK)