Searched refs:PMU (Results 1 – 10 of 10) sorted by relevance
128 PMU->MISC0_CLR = PMU_MISC0_REFTOP_PWD_MASK; in bandgap_set()130 while ((PMU->MISC0 & PMU_MISC0_REFTOP_VBGUP_MASK) == 0) { in bandgap_set()138 PMU->MISC0_SET = PMU_MISC0_REFTOP_PWD_MASK; in bandgap_set()156 PMU_2P5EnableWeakRegulator(PMU, true); in lpm_drop_voltage()157 PMU_1P1EnableWeakRegulator(PMU, true); in lpm_drop_voltage()159 PMU_2P5EnableOutput(PMU, false); in lpm_drop_voltage()160 PMU_1P1EnableOutput(PMU, false); in lpm_drop_voltage()171 PMU_2P5EnableOutput(PMU, true); in lpm_raise_voltage()172 PMU_1P1EnableOutput(PMU, true); in lpm_raise_voltage()174 PMU_2P5EnableWeakRegulator(PMU, false); in lpm_raise_voltage()[all …]
37 if (PMU->FB_STATUS == FPGA_STATUS_ACTIVE) { in eos_s3_fpga_get_status()58 PMU->FFE_FB_PF_SW_WU = PMU_FFE_FB_PF_SW_WU_FB_WU; in eos_s3_fpga_on()59 while (PMU->FFE_FB_PF_SW_WU == PMU_FFE_FB_PF_SW_WU_FB_WU) { in eos_s3_fpga_on()66 PMU->GEN_PURPOSE_0 = FB_CFG_ENABLE; in eos_s3_fpga_on()78 PMU->FB_PWR_MODE_CFG = PMU_FB_PWR_MODE_CFG_FB_SD; in eos_s3_fpga_off()79 PMU->FFE_FB_PF_SW_PD = PMU_FFE_FB_PF_SW_PD_FB_PD; in eos_s3_fpga_off()115 PMU->GEN_PURPOSE_0 = FB_CFG_DISABLE; in eos_s3_fpga_load()117 PMU->FB_ISOLATION = FB_ISOLATION_DISABLE; in eos_s3_fpga_load()
44 | PMU | on-chip | power management |
86 if ((PMU->CAU_SLP_CTRL & PMU_CAU_SLP_CTRL_SOC_SLP_RDY_MASK) == 0U) { in clock_init()
119 /* IMU MPU-6886, RTC BM8563, PMU AXP192 */
193 Enable GD32 Power Management Unit (PMU) HAL module driver
15 - PMU AXP192
170 Set if the power management unit (PMU) module is present in the SoC.
299 Monitoring Unit (PMU).
