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Searched refs:PLLCLKDIVSEL (Results 1 – 6 of 6) sorted by relevance

/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5534/drivers/
Dfsl_clock.c757 switch (SYSCON->PLLCLKDIVSEL) in CLOCK_GetPllClkDivFreq()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5536/drivers/
Dfsl_clock.c757 switch (SYSCON->PLLCLKDIVSEL) in CLOCK_GetPllClkDivFreq()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC55S36/drivers/
Dfsl_clock.c757 switch (SYSCON->PLLCLKDIVSEL) in CLOCK_GetPllClkDivFreq()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5536/
DLPC5536.h40072 …__IO uint32_t PLLCLKDIVSEL; /**< PLL clock divider clock selection, offset: 0… member
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5534/
DLPC5534.h40072 …__IO uint32_t PLLCLKDIVSEL; /**< PLL clock divider clock selection, offset: 0… member
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC55S36/
DLPC55S36.h52286 …__IO uint32_t PLLCLKDIVSEL; /**< PLL clock divider clock selection, offset: 0… member