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Searched refs:PCCCR (Results 1 – 25 of 106) sorted by relevance

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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1175/drivers/cm4/
Dfsl_cache.c31 if (0U == (LMEM->PCCCR & LMEM_PCCCR_ENCACHE_MASK)) in L1CACHE_EnableCodeCache()
37 LMEM->PCCCR |= LMEM_PCCCR_ENCACHE_MASK; in L1CACHE_EnableCodeCache()
51 LMEM->PCCCR &= ~LMEM_PCCCR_ENCACHE_MASK; in L1CACHE_DisableCodeCache()
62 LMEM->PCCCR |= LMEM_PCCCR_INVW0_MASK | LMEM_PCCCR_INVW1_MASK | LMEM_PCCCR_GO_MASK; in L1CACHE_InvalidateCodeCache()
65 while ((LMEM->PCCCR & LMEM_PCCCR_GO_MASK) != 0U) in L1CACHE_InvalidateCodeCache()
70 LMEM->PCCCR &= ~(LMEM_PCCCR_INVW0_MASK | LMEM_PCCCR_INVW1_MASK); in L1CACHE_InvalidateCodeCache()
114 LMEM->PCCCR |= LMEM_PCCCR_PUSHW0_MASK | LMEM_PCCCR_PUSHW1_MASK | LMEM_PCCCR_GO_MASK; in L1CACHE_CleanCodeCache()
117 while ((LMEM->PCCCR & LMEM_PCCCR_GO_MASK) != 0U) in L1CACHE_CleanCodeCache()
122 LMEM->PCCCR &= ~(LMEM_PCCCR_PUSHW0_MASK | LMEM_PCCCR_PUSHW1_MASK); in L1CACHE_CleanCodeCache()
166 …LMEM->PCCCR |= LMEM_PCCCR_PUSHW0_MASK | LMEM_PCCCR_PUSHW1_MASK | LMEM_PCCCR_INVW0_MASK | LMEM_PCCC… in L1CACHE_CleanInvalidateCodeCache()
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1176/drivers/cm4/
Dfsl_cache.c31 if (0U == (LMEM->PCCCR & LMEM_PCCCR_ENCACHE_MASK)) in L1CACHE_EnableCodeCache()
37 LMEM->PCCCR |= LMEM_PCCCR_ENCACHE_MASK; in L1CACHE_EnableCodeCache()
51 LMEM->PCCCR &= ~LMEM_PCCCR_ENCACHE_MASK; in L1CACHE_DisableCodeCache()
62 LMEM->PCCCR |= LMEM_PCCCR_INVW0_MASK | LMEM_PCCCR_INVW1_MASK | LMEM_PCCCR_GO_MASK; in L1CACHE_InvalidateCodeCache()
65 while ((LMEM->PCCCR & LMEM_PCCCR_GO_MASK) != 0U) in L1CACHE_InvalidateCodeCache()
70 LMEM->PCCCR &= ~(LMEM_PCCCR_INVW0_MASK | LMEM_PCCCR_INVW1_MASK); in L1CACHE_InvalidateCodeCache()
114 LMEM->PCCCR |= LMEM_PCCCR_PUSHW0_MASK | LMEM_PCCCR_PUSHW1_MASK | LMEM_PCCCR_GO_MASK; in L1CACHE_CleanCodeCache()
117 while ((LMEM->PCCCR & LMEM_PCCCR_GO_MASK) != 0U) in L1CACHE_CleanCodeCache()
122 LMEM->PCCCR &= ~(LMEM_PCCCR_PUSHW0_MASK | LMEM_PCCCR_PUSHW1_MASK); in L1CACHE_CleanCodeCache()
166 …LMEM->PCCCR |= LMEM_PCCCR_PUSHW0_MASK | LMEM_PCCCR_PUSHW1_MASK | LMEM_PCCCR_INVW0_MASK | LMEM_PCCC… in L1CACHE_CleanInvalidateCodeCache()
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/drivers/cache/lmem/
Dfsl_cache.c31 if (0U == (LMEM->PCCCR & LMEM_PCCCR_ENCACHE_MASK)) in L1CACHE_EnableCodeCache()
37 LMEM->PCCCR |= LMEM_PCCCR_ENCACHE_MASK; in L1CACHE_EnableCodeCache()
51 LMEM->PCCCR &= ~LMEM_PCCCR_ENCACHE_MASK; in L1CACHE_DisableCodeCache()
62 LMEM->PCCCR |= LMEM_PCCCR_INVW0_MASK | LMEM_PCCCR_INVW1_MASK | LMEM_PCCCR_GO_MASK; in L1CACHE_InvalidateCodeCache()
65 while ((LMEM->PCCCR & LMEM_PCCCR_GO_MASK) != 0U) in L1CACHE_InvalidateCodeCache()
70 LMEM->PCCCR &= ~(LMEM_PCCCR_INVW0_MASK | LMEM_PCCCR_INVW1_MASK); in L1CACHE_InvalidateCodeCache()
114 LMEM->PCCCR |= LMEM_PCCCR_PUSHW0_MASK | LMEM_PCCCR_PUSHW1_MASK | LMEM_PCCCR_GO_MASK; in L1CACHE_CleanCodeCache()
117 while ((LMEM->PCCCR & LMEM_PCCCR_GO_MASK) != 0U) in L1CACHE_CleanCodeCache()
122 LMEM->PCCCR &= ~(LMEM_PCCCR_PUSHW0_MASK | LMEM_PCCCR_PUSHW1_MASK); in L1CACHE_CleanCodeCache()
166 …LMEM->PCCCR |= LMEM_PCCCR_PUSHW0_MASK | LMEM_PCCCR_PUSHW1_MASK | LMEM_PCCCR_INVW0_MASK | LMEM_PCCC… in L1CACHE_CleanInvalidateCodeCache()
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1173/drivers/cm4/
Dfsl_cache.c31 if (0U == (LMEM->PCCCR & LMEM_PCCCR_ENCACHE_MASK)) in L1CACHE_EnableCodeCache()
37 LMEM->PCCCR |= LMEM_PCCCR_ENCACHE_MASK; in L1CACHE_EnableCodeCache()
51 LMEM->PCCCR &= ~LMEM_PCCCR_ENCACHE_MASK; in L1CACHE_DisableCodeCache()
62 LMEM->PCCCR |= LMEM_PCCCR_INVW0_MASK | LMEM_PCCCR_INVW1_MASK | LMEM_PCCCR_GO_MASK; in L1CACHE_InvalidateCodeCache()
65 while ((LMEM->PCCCR & LMEM_PCCCR_GO_MASK) != 0U) in L1CACHE_InvalidateCodeCache()
70 LMEM->PCCCR &= ~(LMEM_PCCCR_INVW0_MASK | LMEM_PCCCR_INVW1_MASK); in L1CACHE_InvalidateCodeCache()
114 LMEM->PCCCR |= LMEM_PCCCR_PUSHW0_MASK | LMEM_PCCCR_PUSHW1_MASK | LMEM_PCCCR_GO_MASK; in L1CACHE_CleanCodeCache()
117 while ((LMEM->PCCCR & LMEM_PCCCR_GO_MASK) != 0U) in L1CACHE_CleanCodeCache()
122 LMEM->PCCCR &= ~(LMEM_PCCCR_PUSHW0_MASK | LMEM_PCCCR_PUSHW1_MASK); in L1CACHE_CleanCodeCache()
166 …LMEM->PCCCR |= LMEM_PCCCR_PUSHW0_MASK | LMEM_PCCCR_PUSHW1_MASK | LMEM_PCCCR_INVW0_MASK | LMEM_PCCC… in L1CACHE_CleanInvalidateCodeCache()
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1166/drivers/cm4/
Dfsl_cache.c31 if (0U == (LMEM->PCCCR & LMEM_PCCCR_ENCACHE_MASK)) in L1CACHE_EnableCodeCache()
37 LMEM->PCCCR |= LMEM_PCCCR_ENCACHE_MASK; in L1CACHE_EnableCodeCache()
51 LMEM->PCCCR &= ~LMEM_PCCCR_ENCACHE_MASK; in L1CACHE_DisableCodeCache()
62 LMEM->PCCCR |= LMEM_PCCCR_INVW0_MASK | LMEM_PCCCR_INVW1_MASK | LMEM_PCCCR_GO_MASK; in L1CACHE_InvalidateCodeCache()
65 while ((LMEM->PCCCR & LMEM_PCCCR_GO_MASK) != 0U) in L1CACHE_InvalidateCodeCache()
70 LMEM->PCCCR &= ~(LMEM_PCCCR_INVW0_MASK | LMEM_PCCCR_INVW1_MASK); in L1CACHE_InvalidateCodeCache()
114 LMEM->PCCCR |= LMEM_PCCCR_PUSHW0_MASK | LMEM_PCCCR_PUSHW1_MASK | LMEM_PCCCR_GO_MASK; in L1CACHE_CleanCodeCache()
117 while ((LMEM->PCCCR & LMEM_PCCCR_GO_MASK) != 0U) in L1CACHE_CleanCodeCache()
122 LMEM->PCCCR &= ~(LMEM_PCCCR_PUSHW0_MASK | LMEM_PCCCR_PUSHW1_MASK); in L1CACHE_CleanCodeCache()
166 …LMEM->PCCCR |= LMEM_PCCCR_PUSHW0_MASK | LMEM_PCCCR_PUSHW1_MASK | LMEM_PCCCR_INVW0_MASK | LMEM_PCCC… in L1CACHE_CleanInvalidateCodeCache()
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1165/drivers/cm4/
Dfsl_cache.c31 if (0U == (LMEM->PCCCR & LMEM_PCCCR_ENCACHE_MASK)) in L1CACHE_EnableCodeCache()
37 LMEM->PCCCR |= LMEM_PCCCR_ENCACHE_MASK; in L1CACHE_EnableCodeCache()
51 LMEM->PCCCR &= ~LMEM_PCCCR_ENCACHE_MASK; in L1CACHE_DisableCodeCache()
62 LMEM->PCCCR |= LMEM_PCCCR_INVW0_MASK | LMEM_PCCCR_INVW1_MASK | LMEM_PCCCR_GO_MASK; in L1CACHE_InvalidateCodeCache()
65 while ((LMEM->PCCCR & LMEM_PCCCR_GO_MASK) != 0U) in L1CACHE_InvalidateCodeCache()
70 LMEM->PCCCR &= ~(LMEM_PCCCR_INVW0_MASK | LMEM_PCCCR_INVW1_MASK); in L1CACHE_InvalidateCodeCache()
114 LMEM->PCCCR |= LMEM_PCCCR_PUSHW0_MASK | LMEM_PCCCR_PUSHW1_MASK | LMEM_PCCCR_GO_MASK; in L1CACHE_CleanCodeCache()
117 while ((LMEM->PCCCR & LMEM_PCCCR_GO_MASK) != 0U) in L1CACHE_CleanCodeCache()
122 LMEM->PCCCR &= ~(LMEM_PCCCR_PUSHW0_MASK | LMEM_PCCCR_PUSHW1_MASK); in L1CACHE_CleanCodeCache()
166 …LMEM->PCCCR |= LMEM_PCCCR_PUSHW0_MASK | LMEM_PCCCR_PUSHW1_MASK | LMEM_PCCCR_INVW0_MASK | LMEM_PCCC… in L1CACHE_CleanInvalidateCodeCache()
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/drivers/lmem/
Dfsl_lmem_cache.c44 base->PCCCR |= LMEM_PCCCR_ENCACHE_MASK; in LMEM_EnableCodeCache()
52 base->PCCCR &= ~LMEM_PCCCR_ENCACHE_MASK; in LMEM_EnableCodeCache()
67 base->PCCCR |= LMEM_PCCCR_INVW0_MASK | LMEM_PCCCR_INVW1_MASK | LMEM_PCCCR_GO_MASK; in LMEM_CodeCacheInvalidateAll()
70 while (0U != (base->PCCCR & LMEM_PCCCR_GO_MASK)) in LMEM_CodeCacheInvalidateAll()
76 base->PCCCR &= ~(LMEM_PCCCR_INVW0_MASK | LMEM_PCCCR_INVW1_MASK); in LMEM_CodeCacheInvalidateAll()
91 base->PCCCR |= LMEM_PCCCR_PUSHW0_MASK | LMEM_PCCCR_PUSHW1_MASK | LMEM_PCCCR_GO_MASK; in LMEM_CodeCachePushAll()
94 while (0U != (base->PCCCR & LMEM_PCCCR_GO_MASK)) in LMEM_CodeCachePushAll()
100 base->PCCCR &= ~(LMEM_PCCCR_PUSHW0_MASK | LMEM_PCCCR_PUSHW1_MASK); in LMEM_CodeCachePushAll()
115 …base->PCCCR |= LMEM_PCCCR_PUSHW0_MASK | LMEM_PCCCR_PUSHW1_MASK | LMEM_PCCCR_INVW0_MASK | LMEM_PCCC… in LMEM_CodeCacheClearAll()
119 while (0U != (base->PCCCR & LMEM_PCCCR_GO_MASK)) in LMEM_CodeCacheClearAll()
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8QX3/
Dsystem_MIMX8QX3_cm4.c104 LMEM->PCCCR |= LMEM_PCCCR_INVW1_MASK | LMEM_PCCCR_INVW0_MASK; in SystemInit()
105 LMEM->PCCCR |= LMEM_PCCCR_GO_MASK; in SystemInit()
107 while ((LMEM->PCCCR & LMEM_PCCCR_GO_MASK) != 0UL) in SystemInit()
111 LMEM->PCCCR |= (LMEM_PCCCR_ENWRBUF_MASK | LMEM_PCCCR_ENCACHE_MASK); in SystemInit()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8QX5/
Dsystem_MIMX8QX5_cm4.c106 LMEM->PCCCR |= LMEM_PCCCR_INVW1_MASK | LMEM_PCCCR_INVW0_MASK; in SystemInit()
107 LMEM->PCCCR |= LMEM_PCCCR_GO_MASK; in SystemInit()
109 while ((LMEM->PCCCR & LMEM_PCCCR_GO_MASK) != 0UL) in SystemInit()
113 LMEM->PCCCR |= (LMEM_PCCCR_ENWRBUF_MASK | LMEM_PCCCR_ENCACHE_MASK); in SystemInit()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8QX4/
Dsystem_MIMX8QX4_cm4.c104 LMEM->PCCCR |= LMEM_PCCCR_INVW1_MASK | LMEM_PCCCR_INVW0_MASK; in SystemInit()
105 LMEM->PCCCR |= LMEM_PCCCR_GO_MASK; in SystemInit()
107 while ((LMEM->PCCCR & LMEM_PCCCR_GO_MASK) != 0UL) in SystemInit()
111 LMEM->PCCCR |= (LMEM_PCCCR_ENWRBUF_MASK | LMEM_PCCCR_ENCACHE_MASK); in SystemInit()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8UX5/
Dsystem_MIMX8UX5_cm4.c107 LMEM->PCCCR |= LMEM_PCCCR_INVW1_MASK | LMEM_PCCCR_INVW0_MASK; in SystemInit()
108 LMEM->PCCCR |= LMEM_PCCCR_GO_MASK; in SystemInit()
110 while ((LMEM->PCCCR & LMEM_PCCCR_GO_MASK) != 0UL) in SystemInit()
114 LMEM->PCCCR |= (LMEM_PCCCR_ENWRBUF_MASK | LMEM_PCCCR_ENCACHE_MASK); in SystemInit()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8QX6/
Dsystem_MIMX8QX6_cm4.c106 LMEM->PCCCR |= LMEM_PCCCR_INVW1_MASK | LMEM_PCCCR_INVW0_MASK; in SystemInit()
107 LMEM->PCCCR |= LMEM_PCCCR_GO_MASK; in SystemInit()
109 while ((LMEM->PCCCR & LMEM_PCCCR_GO_MASK) != 0UL) in SystemInit()
113 LMEM->PCCCR |= (LMEM_PCCCR_ENWRBUF_MASK | LMEM_PCCCR_ENCACHE_MASK); in SystemInit()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8UX6/
Dsystem_MIMX8UX6_cm4.c107 LMEM->PCCCR |= LMEM_PCCCR_INVW1_MASK | LMEM_PCCCR_INVW0_MASK; in SystemInit()
108 LMEM->PCCCR |= LMEM_PCCCR_GO_MASK; in SystemInit()
110 while ((LMEM->PCCCR & LMEM_PCCCR_GO_MASK) != 0UL) in SystemInit()
114 LMEM->PCCCR |= (LMEM_PCCCR_ENWRBUF_MASK | LMEM_PCCCR_ENCACHE_MASK); in SystemInit()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8DX3/
Dsystem_MIMX8DX3_cm4.c104 LMEM->PCCCR |= LMEM_PCCCR_INVW1_MASK | LMEM_PCCCR_INVW0_MASK; in SystemInit()
105 LMEM->PCCCR |= LMEM_PCCCR_GO_MASK; in SystemInit()
107 while ((LMEM->PCCCR & LMEM_PCCCR_GO_MASK) != 0UL) in SystemInit()
111 LMEM->PCCCR |= (LMEM_PCCCR_ENWRBUF_MASK | LMEM_PCCCR_ENCACHE_MASK); in SystemInit()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8DX2/
Dsystem_MIMX8DX2_cm4.c106 LMEM->PCCCR |= LMEM_PCCCR_INVW1_MASK | LMEM_PCCCR_INVW0_MASK; in SystemInit()
107 LMEM->PCCCR |= LMEM_PCCCR_GO_MASK; in SystemInit()
109 while ((LMEM->PCCCR & LMEM_PCCCR_GO_MASK) != 0UL) in SystemInit()
113 LMEM->PCCCR |= (LMEM_PCCCR_ENWRBUF_MASK | LMEM_PCCCR_ENCACHE_MASK); in SystemInit()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8QM6/
Dsystem_MIMX8QM6_cm4_core0.c106 LMEM->PCCCR |= LMEM_PCCCR_INVW1_MASK | LMEM_PCCCR_INVW0_MASK; in SystemInit()
107 LMEM->PCCCR |= LMEM_PCCCR_GO_MASK; in SystemInit()
109 while ((LMEM->PCCCR & LMEM_PCCCR_GO_MASK) != 0U) { in SystemInit()
112 LMEM->PCCCR |= (LMEM_PCCCR_ENWRBUF_MASK | LMEM_PCCCR_ENCACHE_MASK); in SystemInit()
Dsystem_MIMX8QM6_cm4_core1.c105 LMEM->PCCCR |= LMEM_PCCCR_INVW1_MASK | LMEM_PCCCR_INVW0_MASK; in SystemInit()
106 LMEM->PCCCR |= LMEM_PCCCR_GO_MASK; in SystemInit()
108 while ((LMEM->PCCCR & LMEM_PCCCR_GO_MASK) != 0U) { in SystemInit()
111 LMEM->PCCCR |= (LMEM_PCCCR_ENWRBUF_MASK | LMEM_PCCCR_ENCACHE_MASK); in SystemInit()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8DX5/
Dsystem_MIMX8DX5_cm4.c106 LMEM->PCCCR |= LMEM_PCCCR_INVW1_MASK | LMEM_PCCCR_INVW0_MASK; in SystemInit()
107 LMEM->PCCCR |= LMEM_PCCCR_GO_MASK; in SystemInit()
109 while ((LMEM->PCCCR & LMEM_PCCCR_GO_MASK) != 0UL) in SystemInit()
113 LMEM->PCCCR |= (LMEM_PCCCR_ENWRBUF_MASK | LMEM_PCCCR_ENCACHE_MASK); in SystemInit()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8QX1/
Dsystem_MIMX8QX1_cm4.c106 LMEM->PCCCR |= LMEM_PCCCR_INVW1_MASK | LMEM_PCCCR_INVW0_MASK; in SystemInit()
107 LMEM->PCCCR |= LMEM_PCCCR_GO_MASK; in SystemInit()
109 while ((LMEM->PCCCR & LMEM_PCCCR_GO_MASK) != 0UL) in SystemInit()
113 LMEM->PCCCR |= (LMEM_PCCCR_ENWRBUF_MASK | LMEM_PCCCR_ENCACHE_MASK); in SystemInit()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8DX4/
Dsystem_MIMX8DX4_cm4.c104 LMEM->PCCCR |= LMEM_PCCCR_INVW1_MASK | LMEM_PCCCR_INVW0_MASK; in SystemInit()
105 LMEM->PCCCR |= LMEM_PCCCR_GO_MASK; in SystemInit()
107 while ((LMEM->PCCCR & LMEM_PCCCR_GO_MASK) != 0UL) in SystemInit()
111 LMEM->PCCCR |= (LMEM_PCCCR_ENWRBUF_MASK | LMEM_PCCCR_ENCACHE_MASK); in SystemInit()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8DX1/
Dsystem_MIMX8DX1_cm4.c106 LMEM->PCCCR |= LMEM_PCCCR_INVW1_MASK | LMEM_PCCCR_INVW0_MASK; in SystemInit()
107 LMEM->PCCCR |= LMEM_PCCCR_GO_MASK; in SystemInit()
109 while ((LMEM->PCCCR & LMEM_PCCCR_GO_MASK) != 0UL) in SystemInit()
113 LMEM->PCCCR |= (LMEM_PCCCR_ENWRBUF_MASK | LMEM_PCCCR_ENCACHE_MASK); in SystemInit()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8QX2/
Dsystem_MIMX8QX2_cm4.c106 LMEM->PCCCR |= LMEM_PCCCR_INVW1_MASK | LMEM_PCCCR_INVW0_MASK; in SystemInit()
107 LMEM->PCCCR |= LMEM_PCCCR_GO_MASK; in SystemInit()
109 while ((LMEM->PCCCR & LMEM_PCCCR_GO_MASK) != 0UL) in SystemInit()
113 LMEM->PCCCR |= (LMEM_PCCCR_ENWRBUF_MASK | LMEM_PCCCR_ENCACHE_MASK); in SystemInit()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8DX6/
Dsystem_MIMX8DX6_cm4.c106 LMEM->PCCCR |= LMEM_PCCCR_INVW1_MASK | LMEM_PCCCR_INVW0_MASK; in SystemInit()
107 LMEM->PCCCR |= LMEM_PCCCR_GO_MASK; in SystemInit()
109 while ((LMEM->PCCCR & LMEM_PCCCR_GO_MASK) != 0UL) in SystemInit()
113 LMEM->PCCCR |= (LMEM_PCCCR_ENWRBUF_MASK | LMEM_PCCCR_ENCACHE_MASK); in SystemInit()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE16F16/
Dsystem_MKE16F16.c94 LMEM->PCCCR |= LMEM_PCCCR_INVW1_MASK | LMEM_PCCCR_INVW0_MASK; in SystemInit()
95 LMEM->PCCCR |= LMEM_PCCCR_GO_MASK; in SystemInit()
97 while (LMEM->PCCCR & LMEM_PCCCR_GO_MASK) { in SystemInit()
100 LMEM->PCCCR |= (LMEM_PCCCR_ENWRBUF_MASK | LMEM_PCCCR_ENCACHE_MASK); in SystemInit()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE14F16/
Dsystem_MKE14F16.c94 LMEM->PCCCR |= LMEM_PCCCR_INVW1_MASK | LMEM_PCCCR_INVW0_MASK; in SystemInit()
95 LMEM->PCCCR |= LMEM_PCCCR_GO_MASK; in SystemInit()
97 while (LMEM->PCCCR & LMEM_PCCCR_GO_MASK) { in SystemInit()
100 LMEM->PCCCR |= (LMEM_PCCCR_ENWRBUF_MASK | LMEM_PCCCR_ENCACHE_MASK); in SystemInit()

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