/hal_nxp-3.5.0/mcux/mcux-sdk/CMSIS/Include/ |
D | core_dsp.h | 63 #define NVIC_GetEnableIRQ(value) do {} while(0) macro
|
D | core_cm0.h | 578 #define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ macro
|
D | core_sc000.h | 706 #define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ macro
|
D | core_cm1.h | 605 #define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ macro
|
D | core_cm0plus.h | 696 #define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ macro
|
D | core_armv8mbl.h | 1191 #define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ macro
|
D | core_cm3.h | 1433 #define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ macro
|
D | core_sc300.h | 1416 #define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ macro
|
D | core_cm4.h | 1606 #define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ macro
|
D | core_cm23.h | 1266 #define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ macro
|
D | core_armv8mml.h | 1966 #define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ macro
|
D | core_cm33.h | 2041 #define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ macro
|
D | core_cm7.h | 1829 #define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ macro
|
D | core_cm35p.h | 2041 #define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ macro
|
D | core_armv81mml.h | 2122 #define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ macro
|
/hal_nxp-3.5.0/mcux/mcux-sdk/drivers/common/ |
D | fsl_common_dsp.h | 94 #define NVIC_GetEnableIRQ(value) do {} while(0) macro
|
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT685S/drivers/ |
D | fsl_power.c | 352 irqEnabled = NVIC_GetEnableIRQ(PMC_PMIC_IRQn) != 0U; in POWER_EnterRbb() 399 irqEnabled = NVIC_GetEnableIRQ(PMC_PMIC_IRQn) != 0U; in POWER_EnterFbb() 445 irqEnabled = NVIC_GetEnableIRQ(PMC_PMIC_IRQn) != 0U; in POWER_EnterNbb()
|
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT633S/drivers/ |
D | fsl_power.c | 352 irqEnabled = NVIC_GetEnableIRQ(PMC_PMIC_IRQn) != 0U; in POWER_EnterRbb() 399 irqEnabled = NVIC_GetEnableIRQ(PMC_PMIC_IRQn) != 0U; in POWER_EnterFbb() 445 irqEnabled = NVIC_GetEnableIRQ(PMC_PMIC_IRQn) != 0U; in POWER_EnterNbb()
|
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT595S/drivers/ |
D | fsl_power.c | 373 irqEnabled = NVIC_GetEnableIRQ(PMU_PMIC_IRQn) != 0U; in AT_QUICKACCESS_SECTION_CODE() 420 irqEnabled = NVIC_GetEnableIRQ(PMU_PMIC_IRQn) != 0U; in AT_QUICKACCESS_SECTION_CODE() 467 irqEnabled = NVIC_GetEnableIRQ(PMU_PMIC_IRQn) != 0U; in AT_QUICKACCESS_SECTION_CODE()
|
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT555S/drivers/ |
D | fsl_power.c | 373 irqEnabled = NVIC_GetEnableIRQ(PMU_PMIC_IRQn) != 0U; in AT_QUICKACCESS_SECTION_CODE() 420 irqEnabled = NVIC_GetEnableIRQ(PMU_PMIC_IRQn) != 0U; in AT_QUICKACCESS_SECTION_CODE() 467 irqEnabled = NVIC_GetEnableIRQ(PMU_PMIC_IRQn) != 0U; in AT_QUICKACCESS_SECTION_CODE()
|
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT533S/drivers/ |
D | fsl_power.c | 373 irqEnabled = NVIC_GetEnableIRQ(PMU_PMIC_IRQn) != 0U; in AT_QUICKACCESS_SECTION_CODE() 420 irqEnabled = NVIC_GetEnableIRQ(PMU_PMIC_IRQn) != 0U; in AT_QUICKACCESS_SECTION_CODE() 467 irqEnabled = NVIC_GetEnableIRQ(PMU_PMIC_IRQn) != 0U; in AT_QUICKACCESS_SECTION_CODE()
|
/hal_nxp-3.5.0/mcux/mcux-sdk/CMSIS/Core/Include/ |
D | core_cm0plus.h | 696 #define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ macro
|
D | core_cm4.h | 1611 #define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ macro
|
D | core_cm7.h | 1838 #define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ macro
|
D | core_cm33.h | 2292 #define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ macro
|