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Searched refs:NVIC_EnableIRQ (Results 1 – 25 of 35) sorted by relevance

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/hal_nxp-3.5.0/mcux/mcux-sdk/CMSIS/Include/
Dcore_dsp.h62 #define NVIC_EnableIRQ(value) do {} while(0) macro
Dcore_cm0.h577 #define NVIC_EnableIRQ __NVIC_EnableIRQ macro
Dcore_sc000.h705 #define NVIC_EnableIRQ __NVIC_EnableIRQ macro
Dcore_cm1.h604 #define NVIC_EnableIRQ __NVIC_EnableIRQ macro
Dcore_cm0plus.h695 #define NVIC_EnableIRQ __NVIC_EnableIRQ macro
Dcore_armv8mbl.h1190 #define NVIC_EnableIRQ __NVIC_EnableIRQ macro
Dcore_cm3.h1432 #define NVIC_EnableIRQ __NVIC_EnableIRQ macro
Dcore_sc300.h1415 #define NVIC_EnableIRQ __NVIC_EnableIRQ macro
Dcore_cm4.h1605 #define NVIC_EnableIRQ __NVIC_EnableIRQ macro
Dcore_cm23.h1265 #define NVIC_EnableIRQ __NVIC_EnableIRQ macro
/hal_nxp-3.5.0/mcux/mcux-sdk/drivers/common/
Dfsl_common_dsp.h93 #define NVIC_EnableIRQ(value) do {} while(0) macro
Dfsl_common_arm.h541 NVIC_EnableIRQ(interrupt); in EnableIRQ()
636 NVIC_EnableIRQ(interrupt); in EnableIRQWithPriority()
/hal_nxp-3.5.0/mcux/mcux-sdk/drivers/itrc/
Dfsl_itrc.c221 NVIC_EnableIRQ(ITRC0_IRQn); in ITRC_Init()
/hal_nxp-3.5.0/mcux/mcux-sdk/drivers/intmux/
Dfsl_intmux.c123 NVIC_EnableIRQ(s_intmuxIRQNumber[instance][channel]); in INTMUX_Init()
/hal_nxp-3.5.0/mcux/mcux-sdk/drivers/cwt/
Dfsl_cwt.c284 NVIC_EnableIRQ(CodeWDG_IRQn); in CWT_Init()
/hal_nxp-3.5.0/mcux/mcux-sdk/drivers/cdog/
Dfsl_cdog.c344 NVIC_EnableIRQ(s_CdogIrqs[i]); in CDOG_Init()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT685S/drivers/
Dfsl_power.c368 NVIC_EnableIRQ(PMC_PMIC_IRQn); in POWER_EnterRbb()
415 NVIC_EnableIRQ(PMC_PMIC_IRQn); in POWER_EnterFbb()
461 NVIC_EnableIRQ(PMC_PMIC_IRQn); in POWER_EnterNbb()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT633S/drivers/
Dfsl_power.c368 NVIC_EnableIRQ(PMC_PMIC_IRQn); in POWER_EnterRbb()
415 NVIC_EnableIRQ(PMC_PMIC_IRQn); in POWER_EnterFbb()
461 NVIC_EnableIRQ(PMC_PMIC_IRQn); in POWER_EnterNbb()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT595S/drivers/
Dfsl_power.c389 NVIC_EnableIRQ(PMU_PMIC_IRQn); in AT_QUICKACCESS_SECTION_CODE()
437 NVIC_EnableIRQ(PMU_PMIC_IRQn); in AT_QUICKACCESS_SECTION_CODE()
484 NVIC_EnableIRQ(PMU_PMIC_IRQn); in AT_QUICKACCESS_SECTION_CODE()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT555S/drivers/
Dfsl_power.c389 NVIC_EnableIRQ(PMU_PMIC_IRQn); in AT_QUICKACCESS_SECTION_CODE()
437 NVIC_EnableIRQ(PMU_PMIC_IRQn); in AT_QUICKACCESS_SECTION_CODE()
484 NVIC_EnableIRQ(PMU_PMIC_IRQn); in AT_QUICKACCESS_SECTION_CODE()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT533S/drivers/
Dfsl_power.c389 NVIC_EnableIRQ(PMU_PMIC_IRQn); in AT_QUICKACCESS_SECTION_CODE()
437 NVIC_EnableIRQ(PMU_PMIC_IRQn); in AT_QUICKACCESS_SECTION_CODE()
484 NVIC_EnableIRQ(PMU_PMIC_IRQn); in AT_QUICKACCESS_SECTION_CODE()
/hal_nxp-3.5.0/mcux/mcux-sdk/drivers/smartcard/
Dfsl_smartcard_emvsim.c463 NVIC_EnableIRQ(s_emvsimIRQ[instance]); in SMARTCARD_EMVSIM_Init()
466 NVIC_EnableIRQ(s_emvsimIRQ[instance]); in SMARTCARD_EMVSIM_Init()
/hal_nxp-3.5.0/mcux/mcux-sdk/components/gpio/
Dfsl_adapter_rt_gpio.c385 NVIC_EnableIRQ(GPIO_INTA_IRQn); in HAL_GpioSetTriggerMode()
Dfsl_adapter_gpio.c702 NVIC_EnableIRQ(irqNo[gpioState->port]); in HAL_GpioSetTriggerMode()
/hal_nxp-3.5.0/mcux/mcux-sdk/CMSIS/Core/Include/
Dcore_cm0plus.h695 #define NVIC_EnableIRQ __NVIC_EnableIRQ macro

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