NMISRC (reference) in projects: hal_nxp-3.5.0

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Searched refs:NMISRC (Results 1 – 25 of 76) sorted by relevance

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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5526/drivers/
D	fsl_power.c	473 …cpu0_nmi_enable = SYSCON->NMISRC & SYSCON_NMISRC_NMIENCPU0_MASK; /* Save the configuration of the … in POWER_EnterDeepSleep() 474 SYSCON->NMISRC &= ~SYSCON_NMISRC_NMIENCPU0_MASK; /* Disable NMI of CPU0 / in POWER_EnterDeepSleep() 497 SYSCON->NMISRC \|= cpu0_nmi_enable; in POWER_EnterDeepSleep() 581 …cpu0_nmi_enable = SYSCON->NMISRC & SYSCON_NMISRC_NMIENCPU0_MASK; / Save the configuration of the … in POWER_EnterPowerDown() 582 SYSCON->NMISRC &= ~SYSCON_NMISRC_NMIENCPU0_MASK; /* Disable NMI of CPU0 / in POWER_EnterPowerDown() 602 SYSCON->NMISRC \|= cpu0_nmi_enable; in POWER_EnterPowerDown() 688 …cpu0_nmi_enable = SYSCON->NMISRC & SYSCON_NMISRC_NMIENCPU0_MASK; / Save the configuration of the … in POWER_EnterDeepPowerDown() 689 SYSCON->NMISRC &= ~SYSCON_NMISRC_NMIENCPU0_MASK; /* Disable NMI of CPU0 */ in POWER_EnterDeepPowerDown() 708 SYSCON->NMISRC \|= cpu0_nmi_enable; in POWER_EnterDeepPowerDown()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5528/drivers/
D	fsl_power.c	473 …cpu0_nmi_enable = SYSCON->NMISRC & SYSCON_NMISRC_NMIENCPU0_MASK; /* Save the configuration of the … in POWER_EnterDeepSleep() 474 SYSCON->NMISRC &= ~SYSCON_NMISRC_NMIENCPU0_MASK; /* Disable NMI of CPU0 / in POWER_EnterDeepSleep() 497 SYSCON->NMISRC \|= cpu0_nmi_enable; in POWER_EnterDeepSleep() 581 …cpu0_nmi_enable = SYSCON->NMISRC & SYSCON_NMISRC_NMIENCPU0_MASK; / Save the configuration of the … in POWER_EnterPowerDown() 582 SYSCON->NMISRC &= ~SYSCON_NMISRC_NMIENCPU0_MASK; /* Disable NMI of CPU0 / in POWER_EnterPowerDown() 602 SYSCON->NMISRC \|= cpu0_nmi_enable; in POWER_EnterPowerDown() 688 …cpu0_nmi_enable = SYSCON->NMISRC & SYSCON_NMISRC_NMIENCPU0_MASK; / Save the configuration of the … in POWER_EnterDeepPowerDown() 689 SYSCON->NMISRC &= ~SYSCON_NMISRC_NMIENCPU0_MASK; /* Disable NMI of CPU0 */ in POWER_EnterDeepPowerDown() 708 SYSCON->NMISRC \|= cpu0_nmi_enable; in POWER_EnterDeepPowerDown()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC55S66/drivers/
D	fsl_power.c	473 …cpu0_nmi_enable = SYSCON->NMISRC & SYSCON_NMISRC_NMIENCPU0_MASK; /* Save the configuration of the … in POWER_EnterDeepSleep() 474 SYSCON->NMISRC &= ~SYSCON_NMISRC_NMIENCPU0_MASK; /* Disable NMI of CPU0 / in POWER_EnterDeepSleep() 497 SYSCON->NMISRC \|= cpu0_nmi_enable; in POWER_EnterDeepSleep() 581 …cpu0_nmi_enable = SYSCON->NMISRC & SYSCON_NMISRC_NMIENCPU0_MASK; / Save the configuration of the … in POWER_EnterPowerDown() 582 SYSCON->NMISRC &= ~SYSCON_NMISRC_NMIENCPU0_MASK; /* Disable NMI of CPU0 / in POWER_EnterPowerDown() 602 SYSCON->NMISRC \|= cpu0_nmi_enable; in POWER_EnterPowerDown() 688 …cpu0_nmi_enable = SYSCON->NMISRC & SYSCON_NMISRC_NMIENCPU0_MASK; / Save the configuration of the … in POWER_EnterDeepPowerDown() 689 SYSCON->NMISRC &= ~SYSCON_NMISRC_NMIENCPU0_MASK; /* Disable NMI of CPU0 */ in POWER_EnterDeepPowerDown() 708 SYSCON->NMISRC \|= cpu0_nmi_enable; in POWER_EnterDeepPowerDown()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC55S69/drivers/
D	fsl_power.c	473 …cpu0_nmi_enable = SYSCON->NMISRC & SYSCON_NMISRC_NMIENCPU0_MASK; /* Save the configuration of the … in POWER_EnterDeepSleep() 474 SYSCON->NMISRC &= ~SYSCON_NMISRC_NMIENCPU0_MASK; /* Disable NMI of CPU0 / in POWER_EnterDeepSleep() 497 SYSCON->NMISRC \|= cpu0_nmi_enable; in POWER_EnterDeepSleep() 581 …cpu0_nmi_enable = SYSCON->NMISRC & SYSCON_NMISRC_NMIENCPU0_MASK; / Save the configuration of the … in POWER_EnterPowerDown() 582 SYSCON->NMISRC &= ~SYSCON_NMISRC_NMIENCPU0_MASK; /* Disable NMI of CPU0 / in POWER_EnterPowerDown() 602 SYSCON->NMISRC \|= cpu0_nmi_enable; in POWER_EnterPowerDown() 688 …cpu0_nmi_enable = SYSCON->NMISRC & SYSCON_NMISRC_NMIENCPU0_MASK; / Save the configuration of the … in POWER_EnterDeepPowerDown() 689 SYSCON->NMISRC &= ~SYSCON_NMISRC_NMIENCPU0_MASK; /* Disable NMI of CPU0 */ in POWER_EnterDeepPowerDown() 708 SYSCON->NMISRC \|= cpu0_nmi_enable; in POWER_EnterDeepPowerDown()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC55S26/drivers/
D	fsl_power.c	473 …cpu0_nmi_enable = SYSCON->NMISRC & SYSCON_NMISRC_NMIENCPU0_MASK; /* Save the configuration of the … in POWER_EnterDeepSleep() 474 SYSCON->NMISRC &= ~SYSCON_NMISRC_NMIENCPU0_MASK; /* Disable NMI of CPU0 / in POWER_EnterDeepSleep() 497 SYSCON->NMISRC \|= cpu0_nmi_enable; in POWER_EnterDeepSleep() 581 …cpu0_nmi_enable = SYSCON->NMISRC & SYSCON_NMISRC_NMIENCPU0_MASK; / Save the configuration of the … in POWER_EnterPowerDown() 582 SYSCON->NMISRC &= ~SYSCON_NMISRC_NMIENCPU0_MASK; /* Disable NMI of CPU0 / in POWER_EnterPowerDown() 602 SYSCON->NMISRC \|= cpu0_nmi_enable; in POWER_EnterPowerDown() 688 …cpu0_nmi_enable = SYSCON->NMISRC & SYSCON_NMISRC_NMIENCPU0_MASK; / Save the configuration of the … in POWER_EnterDeepPowerDown() 689 SYSCON->NMISRC &= ~SYSCON_NMISRC_NMIENCPU0_MASK; /* Disable NMI of CPU0 */ in POWER_EnterDeepPowerDown() 708 SYSCON->NMISRC \|= cpu0_nmi_enable; in POWER_EnterDeepPowerDown()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC55S28/drivers/
D	fsl_power.c	473 …cpu0_nmi_enable = SYSCON->NMISRC & SYSCON_NMISRC_NMIENCPU0_MASK; /* Save the configuration of the … in POWER_EnterDeepSleep() 474 SYSCON->NMISRC &= ~SYSCON_NMISRC_NMIENCPU0_MASK; /* Disable NMI of CPU0 / in POWER_EnterDeepSleep() 497 SYSCON->NMISRC \|= cpu0_nmi_enable; in POWER_EnterDeepSleep() 581 …cpu0_nmi_enable = SYSCON->NMISRC & SYSCON_NMISRC_NMIENCPU0_MASK; / Save the configuration of the … in POWER_EnterPowerDown() 582 SYSCON->NMISRC &= ~SYSCON_NMISRC_NMIENCPU0_MASK; /* Disable NMI of CPU0 / in POWER_EnterPowerDown() 602 SYSCON->NMISRC \|= cpu0_nmi_enable; in POWER_EnterPowerDown() 688 …cpu0_nmi_enable = SYSCON->NMISRC & SYSCON_NMISRC_NMIENCPU0_MASK; / Save the configuration of the … in POWER_EnterDeepPowerDown() 689 SYSCON->NMISRC &= ~SYSCON_NMISRC_NMIENCPU0_MASK; /* Disable NMI of CPU0 */ in POWER_EnterDeepPowerDown() 708 SYSCON->NMISRC \|= cpu0_nmi_enable; in POWER_EnterDeepPowerDown()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC55S06/drivers/
D	fsl_power.c	441 …cpu0_nmi_enable = SYSCON->NMISRC & SYSCON_NMISRC_NMIENCPU0_MASK; /* Save the configuration of the … in POWER_EnterDeepSleep() 442 SYSCON->NMISRC &= ~SYSCON_NMISRC_NMIENCPU0_MASK; /* Disable NMI of CPU0 / in POWER_EnterDeepSleep() 470 SYSCON->NMISRC \|= cpu0_nmi_enable; in POWER_EnterDeepSleep() 567 …cpu0_nmi_enable = SYSCON->NMISRC & SYSCON_NMISRC_NMIENCPU0_MASK; / Save the configuration of the … in POWER_EnterPowerDown() 568 SYSCON->NMISRC &= ~SYSCON_NMISRC_NMIENCPU0_MASK; /* Disable NMI of CPU0 / in POWER_EnterPowerDown() 610 SYSCON->NMISRC \|= cpu0_nmi_enable; in POWER_EnterPowerDown() 703 …cpu0_nmi_enable = SYSCON->NMISRC & SYSCON_NMISRC_NMIENCPU0_MASK; / Save the configuration of the … in POWER_EnterDeepPowerDown() 704 SYSCON->NMISRC &= ~SYSCON_NMISRC_NMIENCPU0_MASK; /* Disable NMI of CPU0 */ in POWER_EnterDeepPowerDown() 728 SYSCON->NMISRC \|= cpu0_nmi_enable; in POWER_EnterDeepPowerDown()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5512/drivers/
D	fsl_power.c	452 …cpu0_nmi_enable = SYSCON->NMISRC & SYSCON_NMISRC_NMIENCPU0_MASK; /* Save the configuration of the … in POWER_EnterDeepSleep() 453 SYSCON->NMISRC &= ~SYSCON_NMISRC_NMIENCPU0_MASK; /* Disable NMI of CPU0 / in POWER_EnterDeepSleep() 481 SYSCON->NMISRC \|= cpu0_nmi_enable; in POWER_EnterDeepSleep() 581 …cpu0_nmi_enable = SYSCON->NMISRC & SYSCON_NMISRC_NMIENCPU0_MASK; / Save the configuration of the … in POWER_EnterPowerDown() 582 SYSCON->NMISRC &= ~SYSCON_NMISRC_NMIENCPU0_MASK; /* Disable NMI of CPU0 / in POWER_EnterPowerDown() 630 SYSCON->NMISRC \|= cpu0_nmi_enable; in POWER_EnterPowerDown() 726 …cpu0_nmi_enable = SYSCON->NMISRC & SYSCON_NMISRC_NMIENCPU0_MASK; / Save the configuration of the … in POWER_EnterDeepPowerDown() 727 SYSCON->NMISRC &= ~SYSCON_NMISRC_NMIENCPU0_MASK; /* Disable NMI of CPU0 */ in POWER_EnterDeepPowerDown() 755 SYSCON->NMISRC \|= cpu0_nmi_enable; in POWER_EnterDeepPowerDown()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5504CPXXXX/drivers/
D	fsl_power.c	441 …cpu0_nmi_enable = SYSCON->NMISRC & SYSCON_NMISRC_NMIENCPU0_MASK; /* Save the configuration of the … in POWER_EnterDeepSleep() 442 SYSCON->NMISRC &= ~SYSCON_NMISRC_NMIENCPU0_MASK; /* Disable NMI of CPU0 / in POWER_EnterDeepSleep() 470 SYSCON->NMISRC \|= cpu0_nmi_enable; in POWER_EnterDeepSleep() 567 …cpu0_nmi_enable = SYSCON->NMISRC & SYSCON_NMISRC_NMIENCPU0_MASK; / Save the configuration of the … in POWER_EnterPowerDown() 568 SYSCON->NMISRC &= ~SYSCON_NMISRC_NMIENCPU0_MASK; /* Disable NMI of CPU0 / in POWER_EnterPowerDown() 592 SYSCON->NMISRC \|= cpu0_nmi_enable; in POWER_EnterPowerDown() 685 …cpu0_nmi_enable = SYSCON->NMISRC & SYSCON_NMISRC_NMIENCPU0_MASK; / Save the configuration of the … in POWER_EnterDeepPowerDown() 686 SYSCON->NMISRC &= ~SYSCON_NMISRC_NMIENCPU0_MASK; /* Disable NMI of CPU0 */ in POWER_EnterDeepPowerDown() 710 SYSCON->NMISRC \|= cpu0_nmi_enable; in POWER_EnterDeepPowerDown()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5506/drivers/
D	fsl_power.c	441 …cpu0_nmi_enable = SYSCON->NMISRC & SYSCON_NMISRC_NMIENCPU0_MASK; /* Save the configuration of the … in POWER_EnterDeepSleep() 442 SYSCON->NMISRC &= ~SYSCON_NMISRC_NMIENCPU0_MASK; /* Disable NMI of CPU0 / in POWER_EnterDeepSleep() 470 SYSCON->NMISRC \|= cpu0_nmi_enable; in POWER_EnterDeepSleep() 567 …cpu0_nmi_enable = SYSCON->NMISRC & SYSCON_NMISRC_NMIENCPU0_MASK; / Save the configuration of the … in POWER_EnterPowerDown() 568 SYSCON->NMISRC &= ~SYSCON_NMISRC_NMIENCPU0_MASK; /* Disable NMI of CPU0 / in POWER_EnterPowerDown() 592 SYSCON->NMISRC \|= cpu0_nmi_enable; in POWER_EnterPowerDown() 685 …cpu0_nmi_enable = SYSCON->NMISRC & SYSCON_NMISRC_NMIENCPU0_MASK; / Save the configuration of the … in POWER_EnterDeepPowerDown() 686 SYSCON->NMISRC &= ~SYSCON_NMISRC_NMIENCPU0_MASK; /* Disable NMI of CPU0 */ in POWER_EnterDeepPowerDown() 710 SYSCON->NMISRC \|= cpu0_nmi_enable; in POWER_EnterDeepPowerDown()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC55S04/drivers/
D	fsl_power.c	441 …cpu0_nmi_enable = SYSCON->NMISRC & SYSCON_NMISRC_NMIENCPU0_MASK; /* Save the configuration of the … in POWER_EnterDeepSleep() 442 SYSCON->NMISRC &= ~SYSCON_NMISRC_NMIENCPU0_MASK; /* Disable NMI of CPU0 / in POWER_EnterDeepSleep() 470 SYSCON->NMISRC \|= cpu0_nmi_enable; in POWER_EnterDeepSleep() 567 …cpu0_nmi_enable = SYSCON->NMISRC & SYSCON_NMISRC_NMIENCPU0_MASK; / Save the configuration of the … in POWER_EnterPowerDown() 568 SYSCON->NMISRC &= ~SYSCON_NMISRC_NMIENCPU0_MASK; /* Disable NMI of CPU0 / in POWER_EnterPowerDown() 610 SYSCON->NMISRC \|= cpu0_nmi_enable; in POWER_EnterPowerDown() 703 …cpu0_nmi_enable = SYSCON->NMISRC & SYSCON_NMISRC_NMIENCPU0_MASK; / Save the configuration of the … in POWER_EnterDeepPowerDown() 704 SYSCON->NMISRC &= ~SYSCON_NMISRC_NMIENCPU0_MASK; /* Disable NMI of CPU0 */ in POWER_EnterDeepPowerDown() 728 SYSCON->NMISRC \|= cpu0_nmi_enable; in POWER_EnterDeepPowerDown()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5502CPXXXX/drivers/
D	fsl_power.c	441 …cpu0_nmi_enable = SYSCON->NMISRC & SYSCON_NMISRC_NMIENCPU0_MASK; /* Save the configuration of the … in POWER_EnterDeepSleep() 442 SYSCON->NMISRC &= ~SYSCON_NMISRC_NMIENCPU0_MASK; /* Disable NMI of CPU0 / in POWER_EnterDeepSleep() 470 SYSCON->NMISRC \|= cpu0_nmi_enable; in POWER_EnterDeepSleep() 567 …cpu0_nmi_enable = SYSCON->NMISRC & SYSCON_NMISRC_NMIENCPU0_MASK; / Save the configuration of the … in POWER_EnterPowerDown() 568 SYSCON->NMISRC &= ~SYSCON_NMISRC_NMIENCPU0_MASK; /* Disable NMI of CPU0 / in POWER_EnterPowerDown() 592 SYSCON->NMISRC \|= cpu0_nmi_enable; in POWER_EnterPowerDown() 685 …cpu0_nmi_enable = SYSCON->NMISRC & SYSCON_NMISRC_NMIENCPU0_MASK; / Save the configuration of the … in POWER_EnterDeepPowerDown() 686 SYSCON->NMISRC &= ~SYSCON_NMISRC_NMIENCPU0_MASK; /* Disable NMI of CPU0 */ in POWER_EnterDeepPowerDown() 710 SYSCON->NMISRC \|= cpu0_nmi_enable; in POWER_EnterDeepPowerDown()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5504/drivers/
D	fsl_power.c	441 …cpu0_nmi_enable = SYSCON->NMISRC & SYSCON_NMISRC_NMIENCPU0_MASK; /* Save the configuration of the … in POWER_EnterDeepSleep() 442 SYSCON->NMISRC &= ~SYSCON_NMISRC_NMIENCPU0_MASK; /* Disable NMI of CPU0 / in POWER_EnterDeepSleep() 470 SYSCON->NMISRC \|= cpu0_nmi_enable; in POWER_EnterDeepSleep() 567 …cpu0_nmi_enable = SYSCON->NMISRC & SYSCON_NMISRC_NMIENCPU0_MASK; / Save the configuration of the … in POWER_EnterPowerDown() 568 SYSCON->NMISRC &= ~SYSCON_NMISRC_NMIENCPU0_MASK; /* Disable NMI of CPU0 / in POWER_EnterPowerDown() 592 SYSCON->NMISRC \|= cpu0_nmi_enable; in POWER_EnterPowerDown() 685 …cpu0_nmi_enable = SYSCON->NMISRC & SYSCON_NMISRC_NMIENCPU0_MASK; / Save the configuration of the … in POWER_EnterDeepPowerDown() 686 SYSCON->NMISRC &= ~SYSCON_NMISRC_NMIENCPU0_MASK; /* Disable NMI of CPU0 */ in POWER_EnterDeepPowerDown() 710 SYSCON->NMISRC \|= cpu0_nmi_enable; in POWER_EnterDeepPowerDown()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC55S16/drivers/
D	fsl_power.c	452 …cpu0_nmi_enable = SYSCON->NMISRC & SYSCON_NMISRC_NMIENCPU0_MASK; /* Save the configuration of the … in POWER_EnterDeepSleep() 453 SYSCON->NMISRC &= ~SYSCON_NMISRC_NMIENCPU0_MASK; /* Disable NMI of CPU0 / in POWER_EnterDeepSleep() 481 SYSCON->NMISRC \|= cpu0_nmi_enable; in POWER_EnterDeepSleep() 581 …cpu0_nmi_enable = SYSCON->NMISRC & SYSCON_NMISRC_NMIENCPU0_MASK; / Save the configuration of the … in POWER_EnterPowerDown() 582 SYSCON->NMISRC &= ~SYSCON_NMISRC_NMIENCPU0_MASK; /* Disable NMI of CPU0 / in POWER_EnterPowerDown() 630 SYSCON->NMISRC \|= cpu0_nmi_enable; in POWER_EnterPowerDown() 726 …cpu0_nmi_enable = SYSCON->NMISRC & SYSCON_NMISRC_NMIENCPU0_MASK; / Save the configuration of the … in POWER_EnterDeepPowerDown() 727 SYSCON->NMISRC &= ~SYSCON_NMISRC_NMIENCPU0_MASK; /* Disable NMI of CPU0 */ in POWER_EnterDeepPowerDown() 755 SYSCON->NMISRC \|= cpu0_nmi_enable; in POWER_EnterDeepPowerDown()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC55S14/drivers/
D	fsl_power.c	452 …cpu0_nmi_enable = SYSCON->NMISRC & SYSCON_NMISRC_NMIENCPU0_MASK; /* Save the configuration of the … in POWER_EnterDeepSleep() 453 SYSCON->NMISRC &= ~SYSCON_NMISRC_NMIENCPU0_MASK; /* Disable NMI of CPU0 / in POWER_EnterDeepSleep() 481 SYSCON->NMISRC \|= cpu0_nmi_enable; in POWER_EnterDeepSleep() 581 …cpu0_nmi_enable = SYSCON->NMISRC & SYSCON_NMISRC_NMIENCPU0_MASK; / Save the configuration of the … in POWER_EnterPowerDown() 582 SYSCON->NMISRC &= ~SYSCON_NMISRC_NMIENCPU0_MASK; /* Disable NMI of CPU0 / in POWER_EnterPowerDown() 630 SYSCON->NMISRC \|= cpu0_nmi_enable; in POWER_EnterPowerDown() 726 …cpu0_nmi_enable = SYSCON->NMISRC & SYSCON_NMISRC_NMIENCPU0_MASK; / Save the configuration of the … in POWER_EnterDeepPowerDown() 727 SYSCON->NMISRC &= ~SYSCON_NMISRC_NMIENCPU0_MASK; /* Disable NMI of CPU0 */ in POWER_EnterDeepPowerDown() 755 SYSCON->NMISRC \|= cpu0_nmi_enable; in POWER_EnterDeepPowerDown()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5506CPXXXX/drivers/
D	fsl_power.c	441 …cpu0_nmi_enable = SYSCON->NMISRC & SYSCON_NMISRC_NMIENCPU0_MASK; /* Save the configuration of the … in POWER_EnterDeepSleep() 442 SYSCON->NMISRC &= ~SYSCON_NMISRC_NMIENCPU0_MASK; /* Disable NMI of CPU0 / in POWER_EnterDeepSleep() 470 SYSCON->NMISRC \|= cpu0_nmi_enable; in POWER_EnterDeepSleep() 567 …cpu0_nmi_enable = SYSCON->NMISRC & SYSCON_NMISRC_NMIENCPU0_MASK; / Save the configuration of the … in POWER_EnterPowerDown() 568 SYSCON->NMISRC &= ~SYSCON_NMISRC_NMIENCPU0_MASK; /* Disable NMI of CPU0 / in POWER_EnterPowerDown() 592 SYSCON->NMISRC \|= cpu0_nmi_enable; in POWER_EnterPowerDown() 685 …cpu0_nmi_enable = SYSCON->NMISRC & SYSCON_NMISRC_NMIENCPU0_MASK; / Save the configuration of the … in POWER_EnterDeepPowerDown() 686 SYSCON->NMISRC &= ~SYSCON_NMISRC_NMIENCPU0_MASK; /* Disable NMI of CPU0 */ in POWER_EnterDeepPowerDown() 710 SYSCON->NMISRC \|= cpu0_nmi_enable; in POWER_EnterDeepPowerDown()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5502/drivers/
D	fsl_power.c	441 …cpu0_nmi_enable = SYSCON->NMISRC & SYSCON_NMISRC_NMIENCPU0_MASK; /* Save the configuration of the … in POWER_EnterDeepSleep() 442 SYSCON->NMISRC &= ~SYSCON_NMISRC_NMIENCPU0_MASK; /* Disable NMI of CPU0 / in POWER_EnterDeepSleep() 470 SYSCON->NMISRC \|= cpu0_nmi_enable; in POWER_EnterDeepSleep() 567 …cpu0_nmi_enable = SYSCON->NMISRC & SYSCON_NMISRC_NMIENCPU0_MASK; / Save the configuration of the … in POWER_EnterPowerDown() 568 SYSCON->NMISRC &= ~SYSCON_NMISRC_NMIENCPU0_MASK; /* Disable NMI of CPU0 / in POWER_EnterPowerDown() 592 SYSCON->NMISRC \|= cpu0_nmi_enable; in POWER_EnterPowerDown() 685 …cpu0_nmi_enable = SYSCON->NMISRC & SYSCON_NMISRC_NMIENCPU0_MASK; / Save the configuration of the … in POWER_EnterDeepPowerDown() 686 SYSCON->NMISRC &= ~SYSCON_NMISRC_NMIENCPU0_MASK; /* Disable NMI of CPU0 */ in POWER_EnterDeepPowerDown() 710 SYSCON->NMISRC \|= cpu0_nmi_enable; in POWER_EnterDeepPowerDown()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5514/drivers/
D	fsl_power.c	452 …cpu0_nmi_enable = SYSCON->NMISRC & SYSCON_NMISRC_NMIENCPU0_MASK; /* Save the configuration of the … in POWER_EnterDeepSleep() 453 SYSCON->NMISRC &= ~SYSCON_NMISRC_NMIENCPU0_MASK; /* Disable NMI of CPU0 / in POWER_EnterDeepSleep() 481 SYSCON->NMISRC \|= cpu0_nmi_enable; in POWER_EnterDeepSleep() 581 …cpu0_nmi_enable = SYSCON->NMISRC & SYSCON_NMISRC_NMIENCPU0_MASK; / Save the configuration of the … in POWER_EnterPowerDown() 582 SYSCON->NMISRC &= ~SYSCON_NMISRC_NMIENCPU0_MASK; /* Disable NMI of CPU0 / in POWER_EnterPowerDown() 630 SYSCON->NMISRC \|= cpu0_nmi_enable; in POWER_EnterPowerDown() 726 …cpu0_nmi_enable = SYSCON->NMISRC & SYSCON_NMISRC_NMIENCPU0_MASK; / Save the configuration of the … in POWER_EnterDeepPowerDown() 727 SYSCON->NMISRC &= ~SYSCON_NMISRC_NMIENCPU0_MASK; /* Disable NMI of CPU0 */ in POWER_EnterDeepPowerDown() 755 SYSCON->NMISRC \|= cpu0_nmi_enable; in POWER_EnterDeepPowerDown()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5516/drivers/
D	fsl_power.c	452 …cpu0_nmi_enable = SYSCON->NMISRC & SYSCON_NMISRC_NMIENCPU0_MASK; /* Save the configuration of the … in POWER_EnterDeepSleep() 453 SYSCON->NMISRC &= ~SYSCON_NMISRC_NMIENCPU0_MASK; /* Disable NMI of CPU0 / in POWER_EnterDeepSleep() 481 SYSCON->NMISRC \|= cpu0_nmi_enable; in POWER_EnterDeepSleep() 581 …cpu0_nmi_enable = SYSCON->NMISRC & SYSCON_NMISRC_NMIENCPU0_MASK; / Save the configuration of the … in POWER_EnterPowerDown() 582 SYSCON->NMISRC &= ~SYSCON_NMISRC_NMIENCPU0_MASK; /* Disable NMI of CPU0 / in POWER_EnterPowerDown() 630 SYSCON->NMISRC \|= cpu0_nmi_enable; in POWER_EnterPowerDown() 726 …cpu0_nmi_enable = SYSCON->NMISRC & SYSCON_NMISRC_NMIENCPU0_MASK; / Save the configuration of the … in POWER_EnterDeepPowerDown() 727 SYSCON->NMISRC &= ~SYSCON_NMISRC_NMIENCPU0_MASK; /* Disable NMI of CPU0 */ in POWER_EnterDeepPowerDown() 755 SYSCON->NMISRC \|= cpu0_nmi_enable; in POWER_EnterDeepPowerDown()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5534/drivers/
D	fsl_power.c	`1625 …cpu0_nmi_enable = SYSCON->NMISRC & SYSCON_NMISRC_NMIENCPU0_MASK; /* Save the configuration of the … in POWER_SetLowPowerMode() 1626 SYSCON->NMISRC &= ~SYSCON_NMISRC_NMIENCPU0_MASK; /* Disable NMI of CPU0 */ in POWER_SetLowPowerMode() 2053 SYSCON->NMISRC \|= cpu0_nmi_enable; in POWER_SetLowPowerMode()`
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5536/drivers/
D	fsl_power.c	`1625 …cpu0_nmi_enable = SYSCON->NMISRC & SYSCON_NMISRC_NMIENCPU0_MASK; /* Save the configuration of the … in POWER_SetLowPowerMode() 1626 SYSCON->NMISRC &= ~SYSCON_NMISRC_NMIENCPU0_MASK; /* Disable NMI of CPU0 */ in POWER_SetLowPowerMode() 2053 SYSCON->NMISRC \|= cpu0_nmi_enable; in POWER_SetLowPowerMode()`
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC55S36/drivers/
D	fsl_power.c	`1625 …cpu0_nmi_enable = SYSCON->NMISRC & SYSCON_NMISRC_NMIENCPU0_MASK; /* Save the configuration of the … in POWER_SetLowPowerMode() 1626 SYSCON->NMISRC &= ~SYSCON_NMISRC_NMIENCPU0_MASK; /* Disable NMI of CPU0 */ in POWER_SetLowPowerMode() 2053 SYSCON->NMISRC \|= cpu0_nmi_enable; in POWER_SetLowPowerMode()`
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC802/
D	LPC802.h	`4566 …__IO uint32_t NMISRC; /**< NMI source selection register, offset: 0x174… member`
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC811/
D	LPC811.h	`4643 …__IO uint32_t NMISRC; /**< NMI source selection register, offset: 0x174… member`
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC810/
D	LPC810.h	`4643 …__IO uint32_t NMISRC; /**< NMI source selection register, offset: 0x174… member`

12 3 4

TraceRecorderSource-2.7.6
TraceRecorderSource-3.4.0
Zephyr-Core-2.7.6
Zephyr-Core-3.4.0
Zephyr-Core-3.5.0
Zephyr-Core-3.6.0
Zephyr-Core-3.7.0
acpica-3.5.0
acpica-3.6.0
acpica-3.7.0
babblesim_base-3.4.0
babblesim_base-3.6.0-3.5.0
babblesim_base-3.7.0
babblesim_ext_2G4_channel_NtNcable-3.7.0-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_channel_multiatt-3.4.0
babblesim_ext_2G4_channel_multiatt-3.7.0-3.6.0-3.5.0
babblesim_ext_2G4_device_WLAN_actmod-3.7.0-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_device_burst_interferer-3.7.0-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_device_playback-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_device_playback-3.7.0
babblesim_ext_2G4_libPhyComv1-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_libPhyComv1-3.7.0
babblesim_ext_2G4_modem_BLE_simple-3.4.0
babblesim_ext_2G4_modem_BLE_simple-3.6.0-3.5.0
babblesim_ext_2G4_modem_BLE_simple-3.7.0
babblesim_ext_2G4_modem_magic-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_modem_magic-3.7.0
babblesim_ext_2G4_phy_v1-3.4.0
babblesim_ext_2G4_phy_v1-3.6.0-3.5.0
babblesim_ext_2G4_phy_v1-3.7.0
babblesim_ext_libCryptov1-3.7.0-3.6.0-3.5.0-3.4.0
bsim-3.4.0
bsim-3.6.0-3.5.0
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cmsis-nn-3.6.0-3.5.0
cmsis-nn-3.7.0
edtt-2.7.6
edtt-3.6.0-3.5.0-3.4.0
edtt-3.7.0
fatfs-2.7.6
fatfs-3.7.0-3.6.0-3.5.0-3.4.0
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hal_ambiq-3.7.0
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hal_espressif-3.7.0
hal_ethos_u-3.6.0-3.5.0-3.4.0
hal_ethos_u-3.7.0
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hal_infineon-3.5.0
hal_infineon-3.6.0
hal_infineon-3.7.0
hal_intel-3.5.0
hal_intel-3.6.0
hal_intel-3.7.0
hal_microchip-2.7.6
hal_microchip-3.6.0-3.5.0-3.4.0
hal_microchip-3.7.0
hal_nordic-2.7.6
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hal_nordic-3.7.0
hal_nuvoton-2.7.6
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hal_nuvoton-3.6.0
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hal_openisa-3.7.0-3.6.0
hal_quicklogic-3.6.0-3.5.0-3.4.0-2.7.6
hal_quicklogic-3.7.0
hal_renesas-3.4.0
hal_renesas-3.5.0
hal_renesas-3.6.0
hal_renesas-3.7.0
hal_rpi_pico-3.4.0
hal_rpi_pico-3.7.0-3.6.0-3.5.0
hal_silabs-2.7.6
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hal_st-3.6.0
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hal_telink-2.7.6
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hal_telink-3.7.0
hal_ti-2.7.6
hal_ti-3.4.0
hal_ti-3.7.0-3.6.0-3.5.0
hal_wurthelektronik-3.5.0-3.4.0
hal_wurthelektronik-3.7.0-3.6.0
hal_xtensa-2.7.6
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hal_xtensa-3.5.0
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libmetal-3.6.0
libmetal-3.7.0
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lvgl-3.7.0
lz4-3.4.0-2.7.6
mbedtls-2.7.6
mbedtls-3.4.0
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mcuboot-2.7.6
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mcuboot-3.5.0
mcuboot-3.6.0
mcuboot-3.7.0
mcumgr-2.7.6
mipi-sys-t-2.7.6
mipi-sys-t-3.4.0
mipi-sys-t-3.6.0-3.5.0
mipi-sys-t-3.7.0
nanopb-2.7.6
nanopb-3.4.0
net-tools-2.7.6
net-tools-3.4.0
net-tools-3.5.0
net-tools-3.6.0
net-tools-3.7.0
nrf_hw_models-2.7.6
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nrf_hw_models-3.5.0
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nrf_hw_models-3.7.0
open-amp-2.7.6
open-amp-3.4.0
open-amp-3.5.0
open-amp-3.6.0
open-amp-3.7.0
openthread-2.7.6
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openthread-3.5.0
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openthread-3.7.0
percepio-3.5.0
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percepio-3.7.0
picolibc-3.5.0-3.4.0
picolibc-3.7.0-3.6.0
psa-arch-tests-3.4.0
segger-2.7.6
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segger-3.6.0-3.5.0
segger-3.7.0
sof-2.7.6
sof-3.4.0
tf-m-tests-3.4.0
tflite-micro-3.4.0-2.7.6
thrift-3.4.0
tinycbor-2.7.6
tinycrypt-3.6.0-3.5.0-3.4.0-2.7.6
tinycrypt-3.7.0
trusted-firmware-a-3.4.0
trusted-firmware-a-3.6.0-3.5.0
trusted-firmware-a-3.7.0
trusted-firmware-m-3.4.0
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trusted-firmware-m-3.6.0
trusted-firmware-m-3.7.0
uoscore-uedhoc-3.4.0
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uoscore-uedhoc-3.7.0
zcbor-3.5.0-3.4.0
zcbor-3.6.0
zcbor-3.7.0
zscilib-3.4.0