Home
last modified time | relevance | path

Searched refs:MU_CR_GIR0_MASK (Results 1 – 2 of 2) sorted by relevance

/hal_nxp-3.5.0/imx/drivers/
Dmu_imx.h61 #define MU_CR_GIR0_MASK (1U<<19U) macro
428 return !(bool)(base->CR & (MU_CR_GIR0_MASK >> index)); in MU_IsGeneralIntAccepted()
Dmu_imx.c117 | (MU_CR_GIR0_MASK>>index); // Set GIRn in MU_TriggerGeneralInt()