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Searched refs:MUX_DIV_TRIG (Results 1 – 4 of 4) sorted by relevance

/hal_nxp-3.5.0/s32/drivers/s32ze/Mcu/src/
DClock_Ip_DividerTrigger.c155 …Clock_Ip_apxCgm[Instance][SelectorIndex]->MUX_DIV_TRIG = MC_CGM_MUX_DIV_TRIG_TRIGGER(CLOCK_IP_TRIG… in Clock_Ip_TriggerUpdateCgmXDivTrigCtrlTctlHhenUpdStat()
/hal_nxp-3.5.0/s32/drivers/s32k3/Mcu/src/
DClock_Ip_DividerTrigger.c172 …Clock_Ip_apxCgm[Instance][SelectorIndex]->MUX_DIV_TRIG = MC_CGM_MUX_DIV_TRIG_TRIGGER(CLOCK_IP_TRIG… in Clock_Ip_TriggerUpdateCgmXDivTrigCtrlTctlHhenUpdStat()
/hal_nxp-3.5.0/s32/drivers/s32ze/Mcu/include/
DClock_Ip_Specific.h213 uint32 MUX_DIV_TRIG; /**< Clock Divider trigger Register */ member
/hal_nxp-3.5.0/s32/drivers/s32k3/Mcu/include/
DClock_Ip_Specific.h367 …uint32 MUX_DIV_TRIG; /**< Clock Mux 0 Divider Trigger Register, offset: 0x338 … member