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Searched refs:MUX_10_CSC (Results 1 – 4 of 4) sorted by relevance

/hal_nxp-3.5.0/s32/drivers/s32k3/BaseNXP/header/
DS32K344_MC_CGM.h137 …__IO uint32_t MUX_10_CSC; /**< Clock Mux 10 Select Control Register, offset… member
/hal_nxp-3.5.0/s32/drivers/s32ze/BaseNXP/header/
DS32Z2_MC_CGM.h161 …__IO uint32_t MUX_10_CSC; /**< Clock Mux 10 Select Control Register, offset… member
/hal_nxp-3.5.0/s32/drivers/s32ze/Mcu/src/
DClock_Ip_Data.c2626 (Clock_Ip_CgmMuxType*)(&IP_MC_CGM_0->MUX_10_CSC),
2645 (Clock_Ip_CgmMuxType*)(&IP_MC_CGM_1->MUX_10_CSC),
2701 (Clock_Ip_CgmMuxType*)(&IP_MC_CGM_4->MUX_10_CSC),
/hal_nxp-3.5.0/s32/drivers/s32k3/Mcu/src/
DClock_Ip_Data.c3346 (Clock_Ip_CgmMuxType*)(&(IP_MC_CGM->MUX_10_CSC)),