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Searched refs:MRMSG_DDR (Results 1 – 13 of 13) sorted by relevance

/hal_nxp-3.5.0/s32/drivers/s32ze/BaseNXP/header/
DS32Z2_I3C.h134 …__I uint32_t MRMSG_DDR; /**< Master Read Message in DDR mode, offset: 0xD… member
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT685S/
DMIMXRT685S_dsp.h10520 …__IO uint32_t MRMSG_DDR; /**< Master Read Message in DDR mode, offset: 0xD… member
DMIMXRT685S_cm33.h17404 …__IO uint32_t MRMSG_DDR; /**< Master Read Message in DDR mode, offset: 0xD… member
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT633S/
DMIMXRT633S.h17404 …__IO uint32_t MRMSG_DDR; /**< Master Read Message in DDR mode, offset: 0xD… member
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5536/
DLPC5536.h20849 …__I uint32_t MRMSG_DDR; /**< Master Read Message in DDR mode, offset: 0xD… member
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT595S/
DMIMXRT595S_dsp.h19820 …__IO uint32_t MRMSG_DDR; /**< Master Read Message in DDR mode, offset: 0xD… member
DMIMXRT595S_cm33.h26779 …__IO uint32_t MRMSG_DDR; /**< Master Read Message in DDR mode, offset: 0xD… member
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5534/
DLPC5534.h20849 …__I uint32_t MRMSG_DDR; /**< Master Read Message in DDR mode, offset: 0xD… member
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT533S/
DMIMXRT533S.h26775 …__IO uint32_t MRMSG_DDR; /**< Master Read Message in DDR mode, offset: 0xD… member
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC55S36/
DLPC55S36.h25650 …__I uint32_t MRMSG_DDR; /**< Master Read Message in DDR mode, offset: 0xD… member
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT555S/
DMIMXRT555S.h26778 …__IO uint32_t MRMSG_DDR; /**< Master Read Message in DDR mode, offset: 0xD… member
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX9352/
DMIMX9352_cm33.h40919 __I uint32_t MRMSG_DDR; /**< Master Read Message in DDR mode, offset: 0xDC */ member
DMIMX9352_ca55.h36207 …__I uint32_t MRMSG_DDR; /**< Master Read Message in DDR mode, offset: 0xD… member