Searched refs:MMAU__A0 (Results 1 – 1 of 1) sorted by relevance
40 #define MMAU__A0 0xF0004010UL /*!< Accumulator register A0 */ macro647 return *((uint32_t volatile *)(MMAU__UDIV | MMAU__A0)); in MMAU_l_udiv_ll()733 return *((uint32_t volatile *)(MMAU__USQR | MMAU__A0)); in MMAU_l_usqr_l()749 return *((uint32_t volatile *)(MMAU__USQRD | MMAU__A0)); in MMAU_l_usqr_d()766 return (uint16_t)(*((uint32_t volatile *)(MMAU__USQR | MMAU__A0))); in MMAU_s_usqr_l()780 return *((uint32_t volatile *)(MMAU__USQRDA | MMAU__A0)); in MMAU_l_usqra()1036 return *((int32_t volatile *)(MMAU__SDIV | MMAU__A0)); in MMAU_l_sdiv_ll()1055 return *((int32_t volatile *)(MMAU__SDIV | MMAU__A0 | MMAU__SAT)); in MMAU_l_sdivs_ll()1840 return *((frac64_t volatile *)(MMAU__QDIVDA | MMAU__A0 | MMAU__SAT)); in MMAU_d_divas_l()
