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Searched refs:MC_ME_PRTN0_PUPD_PCUD_MASK (Results 1 – 5 of 5) sorted by relevance

/hal_nxp-3.5.0/s32/drivers/s32k3/Mcu/include/
DPower_Ip_Specific.h218 #define MC_ME_PRTN0_PUPD_RWBITS_MASK ((uint32)MC_ME_PRTN0_PUPD_PCUD_MASK)
219 #define MC_ME_PRTN1_PUPD_RWBITS_MASK ((uint32)MC_ME_PRTN0_PUPD_PCUD_MASK)
220 #define MC_ME_PRTN2_PUPD_RWBITS_MASK ((uint32)MC_ME_PRTN0_PUPD_PCUD_MASK)
221 #define MC_ME_PRTN3_PUPD_RWBITS_MASK ((uint32)MC_ME_PRTN0_PUPD_PCUD_MASK)
DPower_Ip_MC_ME_Types.h97 #define MC_ME_PRTNX_PUPD_PCUD_TRIG_U32 (MC_ME_PRTN0_PUPD_PCUD_MASK)
/hal_nxp-3.5.0/s32/drivers/s32k3/Mcu/src/
DPower_Ip_MC_ME.c287 TempValue &= (~MC_ME_PRTN0_PUPD_PCUD_MASK); in Power_Ip_MC_ME_TriggerCofbUpdate()
288 TempValue |= (MC_ME_PRTNX_PUPD_PCUD_TRIG_U32 & MC_ME_PRTN0_PUPD_PCUD_MASK); in Power_Ip_MC_ME_TriggerCofbUpdate()
340 if (MC_ME_PRTNX_PUPD_PCUD_TRIG_U32 == (PartitionTriggerMask & MC_ME_PRTN0_PUPD_PCUD_MASK)) in Power_Ip_MC_ME_ConfigurePartitionClock()
349 Power_Ip_MC_ME_TriggerPartitionUpdate(MC_ME_PRTN0_PUPD_PCUD_MASK, PartitionIndex); in Power_Ip_MC_ME_ConfigurePartitionClock()
/hal_nxp-3.5.0/s32/drivers/s32ze/BaseNXP/header/
DS32Z2_MC_ME.h236 #define MC_ME_PRTN0_PUPD_PCUD_MASK (0x1U) macro
239 … (((uint32_t)(((uint32_t)(x)) << MC_ME_PRTN0_PUPD_PCUD_SHIFT)) & MC_ME_PRTN0_PUPD_PCUD_MASK)
/hal_nxp-3.5.0/s32/drivers/s32k3/BaseNXP/header/
DS32K344_MC_ME.h214 #define MC_ME_PRTN0_PUPD_PCUD_MASK (0x1U) macro
217 … (((uint32_t)(((uint32_t)(x)) << MC_ME_PRTN0_PUPD_PCUD_SHIFT)) & MC_ME_PRTN0_PUPD_PCUD_MASK)