MC_CGM_MUX_3_CSC_SELCTL_SHIFT (reference) in projects: hal_nxp-3.5.0

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Searched refs:MC_CGM_MUX_3_CSC_SELCTL_SHIFT (Results 1 – 4 of 4) sorted by relevance

/hal_nxp-3.5.0/s32/drivers/s32ze/Mcu/src/
D	Clock_Ip_Data.c	3361 …{MC_CGM_MUX_3_CSC_SELCTL_MASK, MC_CGM_MUX_3_CSC_SELCTL_SHIFT, 0U, … 3362 …{MC_CGM_MUX_3_CSC_SELCTL_MASK, MC_CGM_MUX_3_CSC_SELCTL_SHIFT, 0U, … 3376 …{MC_CGM_MUX_3_CSC_SELCTL_MASK, MC_CGM_MUX_3_CSC_SELCTL_SHIFT, MC_CGM_MUX_3_DC_0_DIV_MASK, … 3395 …{MC_CGM_MUX_3_CSC_SELCTL_MASK, MC_CGM_MUX_3_CSC_SELCTL_SHIFT, MC_CGM_MUX_3_DC_0_DIV_MASK, … 3396 …{MC_CGM_MUX_3_CSC_SELCTL_MASK, MC_CGM_MUX_3_CSC_SELCTL_SHIFT, MC_CGM_MUX_3_DC_1_DIV_MASK, … 3397 …{MC_CGM_MUX_3_CSC_SELCTL_MASK, MC_CGM_MUX_3_CSC_SELCTL_SHIFT, MC_CGM_MUX_3_DC_2_DIV_MASK, … 3398 …{MC_CGM_MUX_3_CSC_SELCTL_MASK, MC_CGM_MUX_3_CSC_SELCTL_SHIFT, MC_CGM_MUX_3_DC_3_DIV_MASK, … 3400 …{MC_CGM_MUX_3_CSC_SELCTL_MASK, MC_CGM_MUX_3_CSC_SELCTL_SHIFT, MC_CGM_MUX_3_DC_4_DIV_MASK, … 3401 …{MC_CGM_MUX_3_CSC_SELCTL_MASK, MC_CGM_MUX_3_CSC_SELCTL_SHIFT, MC_CGM_MUX_3_DC_5_DIV_MASK, … 3402 …{MC_CGM_MUX_3_CSC_SELCTL_MASK, MC_CGM_MUX_3_CSC_SELCTL_SHIFT, MC_CGM_MUX_3_DC_6_DIV_MASK, … [all …]
/hal_nxp-3.5.0/s32/drivers/s32k3/BaseNXP/header/
D	S32K344_MC_CGM.h	`566 #define MC_CGM_MUX_3_CSC_SELCTL_SHIFT (24U) macro 568 …3_CSC_SELCTL(x) (((uint32_t)(((uint32_t)(x)) << MC_CGM_MUX_3_CSC_SELCTL_SHIFT)) & MC…`
/hal_nxp-3.5.0/s32/drivers/s32ze/BaseNXP/header/
D	S32Z2_MC_CGM.h	`687 #define MC_CGM_MUX_3_CSC_SELCTL_SHIFT (24U) macro 689 …3_CSC_SELCTL(x) (((uint32_t)(((uint32_t)(x)) << MC_CGM_MUX_3_CSC_SELCTL_SHIFT)) & MC…`
/hal_nxp-3.5.0/s32/drivers/s32k3/Mcu/src/
D	Clock_Ip_Data.c	`3675 …{MC_CGM_MUX_3_CSC_SELCTL_MASK, MC_CGM_MUX_3_CSC_SELCTL_SHIFT, MC_CGM_MUX_3_DC_0_…`

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