MC_CGM_MUX_1_CSC_SELCTL_MASK (reference) in projects: hal_nxp-3.5.0

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Searched refs:MC_CGM_MUX_1_CSC_SELCTL_MASK (Results 1 – 4 of 4) sorted by relevance

/hal_nxp-3.5.0/s32/drivers/s32k3/BaseNXP/header/
D	S32K344_MC_CGM.h	`423 #define MC_CGM_MUX_1_CSC_SELCTL_MASK (0x1F000000U) macro 426 … (((uint32_t)(((uint32_t)(x)) << MC_CGM_MUX_1_CSC_SELCTL_SHIFT)) & MC_CGM_MUX_1_CSC_SELCTL_MASK)`
/hal_nxp-3.5.0/s32/drivers/s32ze/Mcu/src/
D	Clock_Ip_Data.c	3404 …{MC_CGM_MUX_1_CSC_SELCTL_MASK, MC_CGM_MUX_1_CSC_SELCTL_SHIFT, MC_CGM_MUX_1_DC_1_DIV_MASK, … 3405 …{MC_CGM_MUX_1_CSC_SELCTL_MASK, MC_CGM_MUX_1_CSC_SELCTL_SHIFT, MC_CGM_MUX_1_DC_0_DIV_MASK, … 3426 …{MC_CGM_MUX_1_CSC_SELCTL_MASK, MC_CGM_MUX_1_CSC_SELCTL_SHIFT, MC_CGM_MUX_1_DC_0_DIV_MASK, … 3428 …{MC_CGM_MUX_1_CSC_SELCTL_MASK, MC_CGM_MUX_1_CSC_SELCTL_SHIFT, MC_CGM_MUX_1_DC_0_DIV_MASK, … 3432 …{MC_CGM_MUX_1_CSC_SELCTL_MASK, MC_CGM_MUX_1_CSC_SELCTL_SHIFT, MC_CGM_MUX_1_DC_0_DIV_MASK, … 3454 …{MC_CGM_MUX_1_CSC_SELCTL_MASK, MC_CGM_MUX_1_CSC_SELCTL_SHIFT, MC_CGM_MUX_1_DC_1_DIV_MASK, … 3455 …{MC_CGM_MUX_1_CSC_SELCTL_MASK, MC_CGM_MUX_1_CSC_SELCTL_SHIFT, MC_CGM_MUX_1_DC_0_DIV_MASK, … 3463 …{MC_CGM_MUX_1_CSC_SELCTL_MASK, MC_CGM_MUX_1_CSC_SELCTL_SHIFT, MC_CGM_MUX_1_DC_0_DIV_MASK, … 3464 …{MC_CGM_MUX_1_CSC_SELCTL_MASK, MC_CGM_MUX_1_CSC_SELCTL_SHIFT, MC_CGM_MUX_1_DC_0_DIV_MASK, …
/hal_nxp-3.5.0/s32/drivers/s32ze/BaseNXP/header/
D	S32Z2_MC_CGM.h	`455 #define MC_CGM_MUX_1_CSC_SELCTL_MASK (0xF000000U) macro 458 … (((uint32_t)(((uint32_t)(x)) << MC_CGM_MUX_1_CSC_SELCTL_SHIFT)) & MC_CGM_MUX_1_CSC_SELCTL_MASK)`
/hal_nxp-3.5.0/s32/drivers/s32k3/Mcu/src/
D	Clock_Ip_Data.c	`3693 …{MC_CGM_MUX_1_CSC_SELCTL_MASK, MC_CGM_MUX_1_CSC_SELCTL_SHIFT, MC_CGM_MUX_1_DC_0_…`

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