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Searched refs:MC_CGM_MUX_0_CSS_SWTRG_MASK (Results 1 – 4 of 4) sorted by relevance

/hal_nxp-3.5.0/s32/drivers/s32ze/Mcu/include/
DClock_Ip_Specific.h171 #define MC_CGM_MUX_CSS_SWTRG_MASK MC_CGM_MUX_0_CSS_SWTRG_MASK
/hal_nxp-3.5.0/s32/drivers/s32k3/Mcu/include/
DClock_Ip_Specific.h328 #define MC_CGM_MUX_CSS_SWTRG_MASK MC_CGM_MUX_0_CSS_SWTRG_MASK
/hal_nxp-3.5.0/s32/drivers/s32k3/BaseNXP/header/
DS32K344_MC_CGM.h269 #define MC_CGM_MUX_0_CSS_SWTRG_MASK (0xE0000U) macro
272 … (((uint32_t)(((uint32_t)(x)) << MC_CGM_MUX_0_CSS_SWTRG_SHIFT)) & MC_CGM_MUX_0_CSS_SWTRG_MASK)
/hal_nxp-3.5.0/s32/drivers/s32ze/BaseNXP/header/
DS32Z2_MC_CGM.h394 #define MC_CGM_MUX_0_CSS_SWTRG_MASK (0xE0000U) macro
397 … (((uint32_t)(((uint32_t)(x)) << MC_CGM_MUX_0_CSS_SWTRG_SHIFT)) & MC_CGM_MUX_0_CSS_SWTRG_MASK)