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Searched refs:MC_CGM_MUX_0_CSC_SELCTL_MASK (Results 1 – 4 of 4) sorted by relevance

/hal_nxp-3.5.0/s32/drivers/s32ze/Mcu/src/
DClock_Ip_Data.c3341 …{MC_CGM_MUX_0_CSC_SELCTL_MASK, MC_CGM_MUX_0_CSC_SELCTL_SHIFT, MC_CGM_MUX_0_DC_0_DIV_MASK, …
3342 …{MC_CGM_MUX_0_CSC_SELCTL_MASK, MC_CGM_MUX_0_CSC_SELCTL_SHIFT, 0U, …
3343 …{MC_CGM_MUX_0_CSC_SELCTL_MASK, MC_CGM_MUX_0_CSC_SELCTL_SHIFT, 0U, …
3344 …{MC_CGM_MUX_0_CSC_SELCTL_MASK, MC_CGM_MUX_0_CSC_SELCTL_SHIFT, 0U, …
3345 …{MC_CGM_MUX_0_CSC_SELCTL_MASK, MC_CGM_MUX_0_CSC_SELCTL_SHIFT, 0U, …
3346 …{MC_CGM_MUX_0_CSC_SELCTL_MASK, MC_CGM_MUX_0_CSC_SELCTL_SHIFT, 0U, …
3347 …{MC_CGM_MUX_0_CSC_SELCTL_MASK, MC_CGM_MUX_0_CSC_SELCTL_SHIFT, 0U, …
3348 …{MC_CGM_MUX_0_CSC_SELCTL_MASK, MC_CGM_MUX_0_CSC_SELCTL_SHIFT, 0U, …
3349 …{MC_CGM_MUX_0_CSC_SELCTL_MASK, MC_CGM_MUX_0_CSC_SELCTL_SHIFT, 0U, …
3350 …{MC_CGM_MUX_0_CSC_SELCTL_MASK, MC_CGM_MUX_0_CSC_SELCTL_SHIFT, 0U, …
[all …]
/hal_nxp-3.5.0/s32/drivers/s32k3/BaseNXP/header/
DS32K344_MC_CGM.h235 #define MC_CGM_MUX_0_CSC_SELCTL_MASK (0xF000000U) macro
238 … (((uint32_t)(((uint32_t)(x)) << MC_CGM_MUX_0_CSC_SELCTL_SHIFT)) & MC_CGM_MUX_0_CSC_SELCTL_MASK)
/hal_nxp-3.5.0/s32/drivers/s32k3/Mcu/src/
DClock_Ip_Data.c3652 …{MC_CGM_MUX_0_CSC_SELCTL_MASK, MC_CGM_MUX_0_CSC_SELCTL_SHIFT, 0U, …
3710 …{MC_CGM_MUX_0_CSC_SELCTL_MASK, MC_CGM_MUX_0_CSC_SELCTL_SHIFT, MC_CGM_MUX_0_DC_1_…
3711 …{MC_CGM_MUX_0_CSC_SELCTL_MASK, MC_CGM_MUX_0_CSC_SELCTL_SHIFT, MC_CGM_MUX_0_DC_2_…
3712 …{MC_CGM_MUX_0_CSC_SELCTL_MASK, MC_CGM_MUX_0_CSC_SELCTL_SHIFT, MC_CGM_MUX_0_DC_3_…
3713 …{MC_CGM_MUX_0_CSC_SELCTL_MASK, MC_CGM_MUX_0_CSC_SELCTL_SHIFT, MC_CGM_MUX_0_DC_4_…
3715 …{MC_CGM_MUX_0_CSC_SELCTL_MASK, MC_CGM_MUX_0_CSC_SELCTL_SHIFT, MC_CGM_MUX_0_DC_5_…
3724 …{MC_CGM_MUX_0_CSC_SELCTL_MASK, MC_CGM_MUX_0_CSC_SELCTL_SHIFT, MC_CGM_MUX_0_DC_0_…
3726 …{MC_CGM_MUX_0_CSC_SELCTL_MASK, MC_CGM_MUX_0_CSC_SELCTL_SHIFT, MC_CGM_MUX_0_DC_6_…
3776 …{MC_CGM_MUX_0_CSC_SELCTL_MASK, MC_CGM_MUX_0_CSC_SELCTL_SHIFT, MC_CGM_MUX_0_DC_7_…
/hal_nxp-3.5.0/s32/drivers/s32ze/BaseNXP/header/
DS32Z2_MC_CGM.h360 #define MC_CGM_MUX_0_CSC_SELCTL_MASK (0x3F000000U) /* Merged from fields with differen… macro
363 …int32_t)(((uint32_t)(x)) << MC_CGM_MUX_0_CSC_SELCTL_SHIFT)) & MC_CGM_MUX_0_CSC_SELCTL_MASK) /* Me…