/hal_nxp-3.5.0/mcux/mcux-sdk/drivers/flexspi/ |
D | fsl_flexspi.c | 292 base->MCR1 = configValue; in FLEXSPI_Init()
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT685S/ |
D | MIMXRT685S_dsp.h | 7245 __IO uint32_t MCR1; /**< Module Control Register 1, offset: 0x4 */ member
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D | MIMXRT685S_cm33.h | 13347 __IO uint32_t MCR1; /**< Module Control Register 1, offset: 0x4 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1015/ |
D | MIMXRT1015.h | 16102 __IO uint32_t MCR1; /**< Module Control Register 1, offset: 0x4 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1011/ |
D | MIMXRT1011.h | 13503 __IO uint32_t MCR1; /**< Module Control Register 1, offset: 0x4 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT633S/ |
D | MIMXRT633S.h | 13347 __IO uint32_t MCR1; /**< Module Control Register 1, offset: 0x4 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5536/ |
D | LPC5536.h | 12297 __IO uint32_t MCR1; /**< Module Control Register 1, offset: 0x4 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT595S/ |
D | MIMXRT595S_dsp.h | 12983 __IO uint32_t MCR1; /**< Module Control Register 1, offset: 0x4 */ member
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D | MIMXRT595S_cm33.h | 19581 __IO uint32_t MCR1; /**< Module Control Register 1, offset: 0x4 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5534/ |
D | LPC5534.h | 12297 __IO uint32_t MCR1; /**< Module Control Register 1, offset: 0x4 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1021/ |
D | MIMXRT1021.h | 19564 __IO uint32_t MCR1; /**< Module Control Register 1, offset: 0x4 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1024/ |
D | MIMXRT1024.h | 19548 __IO uint32_t MCR1; /**< Module Control Register 1, offset: 0x4 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1041/ |
D | MIMXRT1041.h | 21848 __IO uint32_t MCR1; /**< Module Control Register 1, offset: 0x4 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1051/ |
D | MIMXRT1051.h | 20516 __IO uint32_t MCR1; /**< Module Control Register 1, offset: 0x4 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT533S/ |
D | MIMXRT533S.h | 19577 __IO uint32_t MCR1; /**< Module Control Register 1, offset: 0x4 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1052/ |
D | MIMXRT1052.h | 21301 __IO uint32_t MCR1; /**< Module Control Register 1, offset: 0x4 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1061/ |
D | MIMXRT1061.h | 22226 __IO uint32_t MCR1; /**< Module Control Register 1, offset: 0x4 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1042/ |
D | MIMXRT1042.h | 21850 __IO uint32_t MCR1; /**< Module Control Register 1, offset: 0x4 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1062/ |
D | MIMXRT1062.h | 23012 __IO uint32_t MCR1; /**< Module Control Register 1, offset: 0x4 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC55S36/ |
D | LPC55S36.h | 17098 __IO uint32_t MCR1; /**< Module Control Register 1, offset: 0x4 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1064/ |
D | MIMXRT1064.h | 23081 __IO uint32_t MCR1; /**< Module Control Register 1, offset: 0x4 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MN3/ |
D | MIMX8MN3_cm7.h | 26850 __IO uint32_t MCR1; /**< Module Control Register 1, offset: 0x4 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MN2/ |
D | MIMX8MN2_cm7.h | 26848 __IO uint32_t MCR1; /**< Module Control Register 1, offset: 0x4 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8MN1/ |
D | MIMX8MN1_cm7.h | 26850 __IO uint32_t MCR1; /**< Module Control Register 1, offset: 0x4 */ member
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT555S/ |
D | MIMXRT555S.h | 19580 __IO uint32_t MCR1; /**< Module Control Register 1, offset: 0x4 */ member
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