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Searched refs:MCM_ISCR_FOFCE_MASK (Results 1 – 25 of 40) sorted by relevance

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/hal_nxp-3.5.0/s32/drivers/s32ze/BaseNXP/header/
DS32Z2_MCM.h258 #define MCM_ISCR_FOFCE_MASK (0x4000000U) macro
261 … (((uint32_t)(((uint32_t)(x)) << MCM_ISCR_FOFCE_SHIFT)) & MCM_ISCR_FOFCE_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKV30F12810/
DMKV30F12810.h6665 #define MCM_ISCR_FOFCE_MASK (0x4000000U) macro
6671 … (((uint32_t)(((uint32_t)(x)) << MCM_ISCR_FOFCE_SHIFT)) & MCM_ISCR_FOFCE_MASK)
10741 #define MCM_ISR_FOFCE_MASK MCM_ISCR_FOFCE_MASK
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MK02F12810/
DMK02F12810.h6660 #define MCM_ISCR_FOFCE_MASK (0x4000000U) macro
6666 … (((uint32_t)(((uint32_t)(x)) << MCM_ISCR_FOFCE_SHIFT)) & MCM_ISCR_FOFCE_MASK)
10708 #define MCM_ISR_FOFCE_MASK MCM_ISCR_FOFCE_MASK
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKV31F12810/
DMKV31F12810.h7299 #define MCM_ISCR_FOFCE_MASK (0x4000000U) macro
7305 … (((uint32_t)(((uint32_t)(x)) << MCM_ISCR_FOFCE_SHIFT)) & MCM_ISCR_FOFCE_MASK)
11821 #define MCM_ISR_FOFCE_MASK MCM_ISCR_FOFCE_MASK
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKV31F51212/
DMKV31F51212.h8442 #define MCM_ISCR_FOFCE_MASK (0x4000000U) macro
8448 … (((uint32_t)(((uint32_t)(x)) << MCM_ISCR_FOFCE_SHIFT)) & MCM_ISCR_FOFCE_MASK)
13285 #define MCM_ISR_FOFCE_MASK MCM_ISCR_FOFCE_MASK
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MK22F12810/
DMK22F12810.h8038 #define MCM_ISCR_FOFCE_MASK (0x4000000U) macro
8044 … (((uint32_t)(((uint32_t)(x)) << MCM_ISCR_FOFCE_SHIFT)) & MCM_ISCR_FOFCE_MASK)
13846 #define MCM_ISR_FOFCE_MASK MCM_ISCR_FOFCE_MASK
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MK22F51212/
DMK22F51212.h9195 #define MCM_ISCR_FOFCE_MASK (0x4000000U) macro
9201 … (((uint32_t)(((uint32_t)(x)) << MCM_ISCR_FOFCE_SHIFT)) & MCM_ISCR_FOFCE_MASK)
15348 #define MCM_ISR_FOFCE_MASK MCM_ISCR_FOFCE_MASK
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKV31F25612/
DMKV31F25612.h8196 #define MCM_ISCR_FOFCE_MASK (0x4000000U) macro
8202 … (((uint32_t)(((uint32_t)(x)) << MCM_ISCR_FOFCE_SHIFT)) & MCM_ISCR_FOFCE_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MK24F12/
DMK24F12.h15350 #define MCM_ISCR_FOFCE_MASK (0x4000000U) macro
15356 … (((uint32_t)(((uint32_t)(x)) << MCM_ISCR_FOFCE_SHIFT)) & MCM_ISCR_FOFCE_MASK)
24386 #define MCM_ISR_FOFCE_MASK MCM_ISCR_FOFCE_MASK
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE14F16/
DMKE14F16.h12105 #define MCM_ISCR_FOFCE_MASK (0x4000000U) macro
12111 … (((uint32_t)(((uint32_t)(x)) << MCM_ISCR_FOFCE_SHIFT)) & MCM_ISCR_FOFCE_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MK22F25612/
DMK22F25612.h8939 #define MCM_ISCR_FOFCE_MASK (0x4000000U) macro
8945 … (((uint32_t)(((uint32_t)(x)) << MCM_ISCR_FOFCE_SHIFT)) & MCM_ISCR_FOFCE_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MK64F12/
DMK64F12.h17181 #define MCM_ISCR_FOFCE_MASK (0x4000000U) macro
17187 … (((uint32_t)(((uint32_t)(x)) << MCM_ISCR_FOFCE_SHIFT)) & MCM_ISCR_FOFCE_MASK)
26245 #define MCM_ISR_FOFCE_MASK MCM_ISCR_FOFCE_MASK
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MK63F12/
DMK63F12.h17135 #define MCM_ISCR_FOFCE_MASK (0x4000000U) macro
17141 … (((uint32_t)(((uint32_t)(x)) << MCM_ISCR_FOFCE_SHIFT)) & MCM_ISCR_FOFCE_MASK)
26199 #define MCM_ISR_FOFCE_MASK MCM_ISCR_FOFCE_MASK
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE16F16/
DMKE16F16.h13104 #define MCM_ISCR_FOFCE_MASK (0x4000000U) macro
13110 … (((uint32_t)(((uint32_t)(x)) << MCM_ISCR_FOFCE_SHIFT)) & MCM_ISCR_FOFCE_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE18F16/
DMKE18F16.h13109 #define MCM_ISCR_FOFCE_MASK (0x4000000U) macro
13115 … (((uint32_t)(((uint32_t)(x)) << MCM_ISCR_FOFCE_SHIFT)) & MCM_ISCR_FOFCE_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MK22F12/
DMK22F12.h12441 #define MCM_ISCR_FOFCE_MASK (0x4000000U) macro
12447 … (((uint32_t)(((uint32_t)(x)) << MCM_ISCR_FOFCE_SHIFT)) & MCM_ISCR_FOFCE_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MK26F18/
DMK26F18.h18908 #define MCM_ISCR_FOFCE_MASK (0x4000000U) macro
18914 … (((uint32_t)(((uint32_t)(x)) << MCM_ISCR_FOFCE_SHIFT)) & MCM_ISCR_FOFCE_MASK)
34428 #define MCM_ISR_FOFCE_MASK MCM_ISCR_FOFCE_MASK
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MK65F18/
DMK65F18.h20725 #define MCM_ISCR_FOFCE_MASK (0x4000000U) macro
20731 … (((uint32_t)(((uint32_t)(x)) << MCM_ISCR_FOFCE_SHIFT)) & MCM_ISCR_FOFCE_MASK)
36273 #define MCM_ISR_FOFCE_MASK MCM_ISCR_FOFCE_MASK
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MK66F18/
DMK66F18.h20725 #define MCM_ISCR_FOFCE_MASK (0x4000000U) macro
20731 … (((uint32_t)(((uint32_t)(x)) << MCM_ISCR_FOFCE_SHIFT)) & MCM_ISCR_FOFCE_MASK)
36273 #define MCM_ISR_FOFCE_MASK MCM_ISCR_FOFCE_MASK
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/K32L3A60/
DK32L3A60_cm4.h12848 #define MCM_ISCR_FOFCE_MASK (0x4000000U) macro
12854 … (((uint32_t)(((uint32_t)(x)) << MCM_ISCR_FOFCE_SHIFT)) & MCM_ISCR_FOFCE_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKV56F24/
DMKV56F24.h18006 #define MCM_ISCR_FOFCE_MASK (0x4000000U) macro
18012 … (((uint32_t)(((uint32_t)(x)) << MCM_ISCR_FOFCE_SHIFT)) & MCM_ISCR_FOFCE_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKV58F24/
DMKV58F24.h19772 #define MCM_ISCR_FOFCE_MASK (0x4000000U) macro
19778 … (((uint32_t)(((uint32_t)(x)) << MCM_ISCR_FOFCE_SHIFT)) & MCM_ISCR_FOFCE_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MK80F25615/
DMK80F25615.h16918 #define MCM_ISCR_FOFCE_MASK (0x4000000U) macro
16924 … (((uint32_t)(((uint32_t)(x)) << MCM_ISCR_FOFCE_SHIFT)) & MCM_ISCR_FOFCE_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MK82F25615/
DMK82F25615.h17665 #define MCM_ISCR_FOFCE_MASK (0x4000000U) macro
17671 … (((uint32_t)(((uint32_t)(x)) << MCM_ISCR_FOFCE_SHIFT)) & MCM_ISCR_FOFCE_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MK27FA15/
DMK27FA15.h16423 #define MCM_ISCR_FOFCE_MASK (0x4000000U) macro
16429 … (((uint32_t)(((uint32_t)(x)) << MCM_ISCR_FOFCE_SHIFT)) & MCM_ISCR_FOFCE_MASK)

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