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Searched refs:MCG_S2_PLLCST_VAL (Results 1 – 25 of 33) sorted by relevance

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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MK26F18/drivers/
Dfsl_clock.c57 #define MCG_S2_PLLCST_VAL (((uint32_t)MCG->S2 & (uint32_t)MCG_S2_PLLCST_MASK) >> (uint32_t)MCG_S2_P… macro
837 uint32_t pllcst = MCG_S2_PLLCST_VAL; in CLOCK_GetOutClkFreq()
1307 while ((uint32_t)pllcs != MCG_S2_PLLCST_VAL) in CLOCK_SetPllClkSel()
2245 while ((uint32_t)pllcs != MCG_S2_PLLCST_VAL) in CLOCK_SetPbeMode()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MK27FA15/drivers/
Dfsl_clock.c57 #define MCG_S2_PLLCST_VAL (((uint32_t)MCG->S2 & (uint32_t)MCG_S2_PLLCST_MASK) >> (uint32_t)MCG_S2_P… macro
796 uint32_t pllcst = MCG_S2_PLLCST_VAL; in CLOCK_GetOutClkFreq()
1266 while ((uint32_t)pllcs != MCG_S2_PLLCST_VAL) in CLOCK_SetPllClkSel()
2204 while ((uint32_t)pllcs != MCG_S2_PLLCST_VAL) in CLOCK_SetPbeMode()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MK66F18/drivers/
Dfsl_clock.c57 #define MCG_S2_PLLCST_VAL (((uint32_t)MCG->S2 & (uint32_t)MCG_S2_PLLCST_MASK) >> (uint32_t)MCG_S2_P… macro
836 uint32_t pllcst = MCG_S2_PLLCST_VAL; in CLOCK_GetOutClkFreq()
1306 while ((uint32_t)pllcs != MCG_S2_PLLCST_VAL) in CLOCK_SetPllClkSel()
2244 while ((uint32_t)pllcs != MCG_S2_PLLCST_VAL) in CLOCK_SetPbeMode()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MK65F18/drivers/
Dfsl_clock.c57 #define MCG_S2_PLLCST_VAL (((uint32_t)MCG->S2 & (uint32_t)MCG_S2_PLLCST_MASK) >> (uint32_t)MCG_S2_P… macro
837 uint32_t pllcst = MCG_S2_PLLCST_VAL; in CLOCK_GetOutClkFreq()
1307 while ((uint32_t)pllcs != MCG_S2_PLLCST_VAL) in CLOCK_SetPllClkSel()
2245 while ((uint32_t)pllcs != MCG_S2_PLLCST_VAL) in CLOCK_SetPbeMode()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MK28FA15/drivers/
Dfsl_clock.c57 #define MCG_S2_PLLCST_VAL (((uint32_t)MCG->S2 & (uint32_t)MCG_S2_PLLCST_MASK) >> (uint32_t)MCG_S2_P… macro
796 uint32_t pllcst = MCG_S2_PLLCST_VAL; in CLOCK_GetOutClkFreq()
1266 while ((uint32_t)pllcs != MCG_S2_PLLCST_VAL) in CLOCK_SetPllClkSel()
2204 while ((uint32_t)pllcs != MCG_S2_PLLCST_VAL) in CLOCK_SetPbeMode()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKM33ZA5/drivers/
Dfsl_clock.c57 #define MCG_S2_PLLCST_VAL (((uint32_t)MCG->S2 & (uint32_t)MCG_S2_PLLCST_MASK) >> (uint32_t)MC… macro
659 uint32_t pllcst = MCG_S2_PLLCST_VAL; in CLOCK_GetOutClkFreq()
1274 while ((uint32_t)pllcs != MCG_S2_PLLCST_VAL) in CLOCK_SetPllClkSel()
2502 while ((uint32_t)pllcs != MCG_S2_PLLCST_VAL) in CLOCK_SetPbeMode()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKM14ZA5/drivers/
Dfsl_clock.c57 #define MCG_S2_PLLCST_VAL (((uint32_t)MCG->S2 & (uint32_t)MCG_S2_PLLCST_MASK) >> (uint32_t)MC… macro
659 uint32_t pllcst = MCG_S2_PLLCST_VAL; in CLOCK_GetOutClkFreq()
1274 while ((uint32_t)pllcs != MCG_S2_PLLCST_VAL) in CLOCK_SetPllClkSel()
2502 while ((uint32_t)pllcs != MCG_S2_PLLCST_VAL) in CLOCK_SetPbeMode()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKV11Z7/drivers/
Dfsl_clock.c57 #define MCG_S2_PLLCST_VAL (((uint32_t)MCG->S2 & (uint32_t)MCG_S2_PLLCST_MASK) >> (uint32_t)MC… macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKV10Z1287/drivers/
Dfsl_clock.c57 #define MCG_S2_PLLCST_VAL (((uint32_t)MCG->S2 & (uint32_t)MCG_S2_PLLCST_MASK) >> (uint32_t)MC… macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKV10Z7/drivers/
Dfsl_clock.c57 #define MCG_S2_PLLCST_VAL ((MCG->S2 & MCG_S2_PLLCST_MASK) >> MCG_S2_PLLCST_SHIFT) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKW41Z4/drivers/
Dfsl_clock.c103 #define MCG_S2_PLLCST_VAL ((MCG->S2 & MCG_S2_PLLCST_MASK) >> MCG_S2_PLLCST_SHIFT) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKV31F12810/drivers/
Dfsl_clock.c57 #define MCG_S2_PLLCST_VAL (((uint32_t)MCG->S2 & (uint32_t)MCG_S2_PLLCST_MASK) >> (uint32_t)MCG_S2_P… macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKV30F12810/drivers/
Dfsl_clock.c57 #define MCG_S2_PLLCST_VAL (((uint32_t)MCG->S2 & (uint32_t)MCG_S2_PLLCST_MASK) >> (uint32_t)MCG_S2_P… macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MK02F12810/drivers/
Dfsl_clock.c57 #define MCG_S2_PLLCST_VAL (((uint32_t)MCG->S2 & (uint32_t)MCG_S2_PLLCST_MASK) >> (uint32_t)MC… macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MK22F12810/drivers/
Dfsl_clock.c57 #define MCG_S2_PLLCST_VAL (((uint32_t)MCG->S2 & (uint32_t)MCG_S2_PLLCST_MASK) >> (uint32_t)MC… macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKL25Z4/drivers/
Dfsl_clock.c75 #define MCG_S2_PLLCST_VAL ((MCG->S2 & MCG_S2_PLLCST_MASK) >> MCG_S2_PLLCST_SHIFT) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKW22D5/drivers/
Dfsl_clock.c75 #define MCG_S2_PLLCST_VAL ((MCG->S2 & MCG_S2_PLLCST_MASK) >> MCG_S2_PLLCST_SHIFT) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKW24D5/drivers/
Dfsl_clock.c75 #define MCG_S2_PLLCST_VAL ((MCG->S2 & MCG_S2_PLLCST_MASK) >> MCG_S2_PLLCST_SHIFT) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKV56F24/drivers/
Dfsl_clock.c57 #define MCG_S2_PLLCST_VAL (((uint32_t)MCG->S2 & (uint32_t)MCG_S2_PLLCST_MASK) >> (uint32_t)MCG_S2_P… macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKV58F24/drivers/
Dfsl_clock.c57 #define MCG_S2_PLLCST_VAL (((uint32_t)MCG->S2 & (uint32_t)MCG_S2_PLLCST_MASK) >> (uint32_t)MCG_S2_P… macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKV31F51212/drivers/
Dfsl_clock.c57 #define MCG_S2_PLLCST_VAL (((uint32_t)MCG->S2 & (uint32_t)MCG_S2_PLLCST_MASK) >> (uint32_t)MC… macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKV31F25612/drivers/
Dfsl_clock.c57 #define MCG_S2_PLLCST_VAL (((uint32_t)MCG->S2 & (uint32_t)MCG_S2_PLLCST_MASK) >> (uint32_t)MCG_S2_P… macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKM34Z7/drivers/
Dfsl_clock.c57 #define MCG_S2_PLLCST_VAL ((MCG->S2 & MCG_S2_PLLCST_MASK) >> MCG_S2_PLLCST_SHIFT) macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKM35Z7/drivers/
Dfsl_clock.c57 #define MCG_S2_PLLCST_VAL (((uint32_t)MCG->S2 & (uint32_t)MCG_S2_PLLCST_MASK) >> (uint32_t)MC… macro
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKM34ZA5/drivers/
Dfsl_clock.c57 #define MCG_S2_PLLCST_VAL (((uint32_t)MCG->S2 & (uint32_t)MCG_S2_PLLCST_MASK) >> (uint32_t)MC… macro

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