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Searched refs:MAC_Q0_TX_FLOW_CTRL (Results 1 – 2 of 2) sorted by relevance

/hal_nxp-3.5.0/s32/drivers/s32k3/Eth_GMAC/src/
DGmac_Ip.c670 Base->MAC_Q0_TX_FLOW_CTRL = 0U; in Gmac_Ip_InitMAC()
/hal_nxp-3.5.0/s32/drivers/s32k3/BaseNXP/header/
DS32K344_EMAC.h106 __IO uint32_t MAC_Q0_TX_FLOW_CTRL; /**< MAC Q0 Tx Flow Control, offset: 0x70 */ member