| /hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8QM6/drivers/ |
| D | fsl_clock.c | 61 return CLOCK_EnableClockExtMapped((uint32_t *)LPCG_TUPLE_REG_BASE(name), name, gate); in CLOCK_EnableClockExt()
100 return CLOCK_DisableClockMapped((uint32_t *)LPCG_TUPLE_REG_BASE(name), name); in CLOCK_DisableClock()
274 CLOCK_ConfigLPCGMapped((uint32_t *)LPCG_TUPLE_REG_BASE(name), name, swGate, hwGate); in CLOCK_ConfigLPCG()
|
| /hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8QX3/drivers/ |
| D | fsl_clock.c | 243 regBase = LPCG_TUPLE_REG_BASE(name); in CLOCK_ConfigLPCG()
|
| D | fsl_clock.h | 253 #define LPCG_TUPLE_REG_BASE(tuple) ((volatile uint32_t *)((((uint32_t)(tuple) >> 10U) & 0xFFFFFU) <… macro
|
| /hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8QX4/drivers/ |
| D | fsl_clock.c | 243 regBase = LPCG_TUPLE_REG_BASE(name); in CLOCK_ConfigLPCG()
|
| D | fsl_clock.h | 253 #define LPCG_TUPLE_REG_BASE(tuple) ((volatile uint32_t *)((((uint32_t)(tuple) >> 10U) & 0xFFFFFU) <… macro
|
| /hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8QX5/drivers/ |
| D | fsl_clock.c | 243 regBase = LPCG_TUPLE_REG_BASE(name); in CLOCK_ConfigLPCG()
|
| D | fsl_clock.h | 253 #define LPCG_TUPLE_REG_BASE(tuple) ((volatile uint32_t *)((((uint32_t)(tuple) >> 10U) & 0xFFFFFU) <… macro
|
| /hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8UX5/drivers/ |
| D | fsl_clock.c | 243 regBase = LPCG_TUPLE_REG_BASE(name); in CLOCK_ConfigLPCG()
|
| D | fsl_clock.h | 253 #define LPCG_TUPLE_REG_BASE(tuple) ((volatile uint32_t *)((((uint32_t)(tuple) >> 10U) & 0xFFFFFU) <… macro
|
| /hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8QX6/drivers/ |
| D | fsl_clock.c | 243 regBase = LPCG_TUPLE_REG_BASE(name); in CLOCK_ConfigLPCG()
|
| D | fsl_clock.h | 253 #define LPCG_TUPLE_REG_BASE(tuple) ((volatile uint32_t *)((((uint32_t)(tuple) >> 10U) & 0xFFFFFU) <… macro
|
| /hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8UX6/drivers/ |
| D | fsl_clock.c | 243 regBase = LPCG_TUPLE_REG_BASE(name); in CLOCK_ConfigLPCG()
|
| D | fsl_clock.h | 253 #define LPCG_TUPLE_REG_BASE(tuple) ((volatile uint32_t *)((((uint32_t)(tuple) >> 10U) & 0xFFFFFU) <… macro
|
| /hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8DX1/drivers/ |
| D | fsl_clock.c | 243 regBase = LPCG_TUPLE_REG_BASE(name); in CLOCK_ConfigLPCG()
|
| D | fsl_clock.h | 253 #define LPCG_TUPLE_REG_BASE(tuple) ((volatile uint32_t *)((((uint32_t)(tuple) >> 10U) & 0xFFFFFU) <… macro
|
| /hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8DX3/drivers/ |
| D | fsl_clock.c | 243 regBase = LPCG_TUPLE_REG_BASE(name); in CLOCK_ConfigLPCG()
|
| D | fsl_clock.h | 253 #define LPCG_TUPLE_REG_BASE(tuple) ((volatile uint32_t *)((((uint32_t)(tuple) >> 10U) & 0xFFFFFU) <… macro
|
| /hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8DX2/drivers/ |
| D | fsl_clock.c | 243 regBase = LPCG_TUPLE_REG_BASE(name); in CLOCK_ConfigLPCG()
|
| D | fsl_clock.h | 253 #define LPCG_TUPLE_REG_BASE(tuple) ((volatile uint32_t *)((((uint32_t)(tuple) >> 10U) & 0xFFFFFU) <… macro
|
| /hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8DX5/drivers/ |
| D | fsl_clock.c | 243 regBase = LPCG_TUPLE_REG_BASE(name); in CLOCK_ConfigLPCG()
|
| D | fsl_clock.h | 253 #define LPCG_TUPLE_REG_BASE(tuple) ((volatile uint32_t *)((((uint32_t)(tuple) >> 10U) & 0xFFFFFU) <… macro
|
| /hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8QX1/drivers/ |
| D | fsl_clock.c | 243 regBase = LPCG_TUPLE_REG_BASE(name); in CLOCK_ConfigLPCG()
|
| /hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8DX4/drivers/ |
| D | fsl_clock.c | 243 regBase = LPCG_TUPLE_REG_BASE(name); in CLOCK_ConfigLPCG()
|
| /hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8QX2/drivers/ |
| D | fsl_clock.c | 243 regBase = LPCG_TUPLE_REG_BASE(name); in CLOCK_ConfigLPCG()
|
| /hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8DX6/drivers/ |
| D | fsl_clock.c | 243 regBase = LPCG_TUPLE_REG_BASE(name); in CLOCK_ConfigLPCG()
|
