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Searched refs:LPCG_TUPLE (Results 1 – 15 of 15) sorted by relevance

/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8QX3/drivers/
Dfsl_clock.h251 #define LPCG_TUPLE(rsrc, base) ((uint32_t)((((base) >> 12U) << 10U) | (rsrc))) macro
265 kCLOCK_M4_0_Irqsteer = LPCG_TUPLE(SC_R_IRQSTR_M4_0, NV),
266 kCLOCK_DMA_Lpspi0 = LPCG_TUPLE(SC_R_SPI_0, ADMA__LPCG_SPI0_IPG_CLK_BASE),
267 kCLOCK_DMA_Lpspi1 = LPCG_TUPLE(SC_R_SPI_1, ADMA__LPCG_SPI1_IPG_CLK_BASE),
268 kCLOCK_DMA_Lpspi2 = LPCG_TUPLE(SC_R_SPI_2, ADMA__LPCG_SPI2_IPG_CLK_BASE),
269 kCLOCK_DMA_Lpspi3 = LPCG_TUPLE(SC_R_SPI_3, ADMA__LPCG_SPI3_IPG_CLK_BASE),
270 kCLOCK_DMA_Lpuart0 = LPCG_TUPLE(SC_R_UART_0, ADMA__LPCG_UART0_IPG_CLK_BASE),
271 kCLOCK_DMA_Lpuart1 = LPCG_TUPLE(SC_R_UART_1, ADMA__LPCG_UART1_IPG_CLK_BASE),
272 kCLOCK_DMA_Lpuart2 = LPCG_TUPLE(SC_R_UART_2, ADMA__LPCG_UART2_IPG_CLK_BASE),
273 kCLOCK_DMA_Lpuart3 = LPCG_TUPLE(SC_R_UART_3, ADMA__LPCG_UART3_IPG_CLK_BASE),
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8QX5/drivers/
Dfsl_clock.h251 #define LPCG_TUPLE(rsrc, base) ((uint32_t)((((base) >> 12U) << 10U) | (rsrc))) macro
265 kCLOCK_M4_0_Irqsteer = LPCG_TUPLE(SC_R_IRQSTR_M4_0, NV),
266 kCLOCK_DMA_Lpspi0 = LPCG_TUPLE(SC_R_SPI_0, ADMA__LPCG_SPI0_IPG_CLK_BASE),
267 kCLOCK_DMA_Lpspi1 = LPCG_TUPLE(SC_R_SPI_1, ADMA__LPCG_SPI1_IPG_CLK_BASE),
268 kCLOCK_DMA_Lpspi2 = LPCG_TUPLE(SC_R_SPI_2, ADMA__LPCG_SPI2_IPG_CLK_BASE),
269 kCLOCK_DMA_Lpspi3 = LPCG_TUPLE(SC_R_SPI_3, ADMA__LPCG_SPI3_IPG_CLK_BASE),
270 kCLOCK_DMA_Lpuart0 = LPCG_TUPLE(SC_R_UART_0, ADMA__LPCG_UART0_IPG_CLK_BASE),
271 kCLOCK_DMA_Lpuart1 = LPCG_TUPLE(SC_R_UART_1, ADMA__LPCG_UART1_IPG_CLK_BASE),
272 kCLOCK_DMA_Lpuart2 = LPCG_TUPLE(SC_R_UART_2, ADMA__LPCG_UART2_IPG_CLK_BASE),
273 kCLOCK_DMA_Lpuart3 = LPCG_TUPLE(SC_R_UART_3, ADMA__LPCG_UART3_IPG_CLK_BASE),
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8QX4/drivers/
Dfsl_clock.h251 #define LPCG_TUPLE(rsrc, base) ((uint32_t)((((base) >> 12U) << 10U) | (rsrc))) macro
265 kCLOCK_M4_0_Irqsteer = LPCG_TUPLE(SC_R_IRQSTR_M4_0, NV),
266 kCLOCK_DMA_Lpspi0 = LPCG_TUPLE(SC_R_SPI_0, ADMA__LPCG_SPI0_IPG_CLK_BASE),
267 kCLOCK_DMA_Lpspi1 = LPCG_TUPLE(SC_R_SPI_1, ADMA__LPCG_SPI1_IPG_CLK_BASE),
268 kCLOCK_DMA_Lpspi2 = LPCG_TUPLE(SC_R_SPI_2, ADMA__LPCG_SPI2_IPG_CLK_BASE),
269 kCLOCK_DMA_Lpspi3 = LPCG_TUPLE(SC_R_SPI_3, ADMA__LPCG_SPI3_IPG_CLK_BASE),
270 kCLOCK_DMA_Lpuart0 = LPCG_TUPLE(SC_R_UART_0, ADMA__LPCG_UART0_IPG_CLK_BASE),
271 kCLOCK_DMA_Lpuart1 = LPCG_TUPLE(SC_R_UART_1, ADMA__LPCG_UART1_IPG_CLK_BASE),
272 kCLOCK_DMA_Lpuart2 = LPCG_TUPLE(SC_R_UART_2, ADMA__LPCG_UART2_IPG_CLK_BASE),
273 kCLOCK_DMA_Lpuart3 = LPCG_TUPLE(SC_R_UART_3, ADMA__LPCG_UART3_IPG_CLK_BASE),
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8UX5/drivers/
Dfsl_clock.h251 #define LPCG_TUPLE(rsrc, base) ((uint32_t)((((base) >> 12U) << 10U) | (rsrc))) macro
265 kCLOCK_M4_0_Irqsteer = LPCG_TUPLE(SC_R_IRQSTR_M4_0, NV),
266 kCLOCK_DMA_Lpspi0 = LPCG_TUPLE(SC_R_SPI_0, ADMA__LPCG_SPI0_IPG_CLK_BASE),
267 kCLOCK_DMA_Lpspi1 = LPCG_TUPLE(SC_R_SPI_1, ADMA__LPCG_SPI1_IPG_CLK_BASE),
268 kCLOCK_DMA_Lpspi2 = LPCG_TUPLE(SC_R_SPI_2, ADMA__LPCG_SPI2_IPG_CLK_BASE),
269 kCLOCK_DMA_Lpspi3 = LPCG_TUPLE(SC_R_SPI_3, ADMA__LPCG_SPI3_IPG_CLK_BASE),
270 kCLOCK_DMA_Lpuart0 = LPCG_TUPLE(SC_R_UART_0, ADMA__LPCG_UART0_IPG_CLK_BASE),
271 kCLOCK_DMA_Lpuart1 = LPCG_TUPLE(SC_R_UART_1, ADMA__LPCG_UART1_IPG_CLK_BASE),
272 kCLOCK_DMA_Lpuart2 = LPCG_TUPLE(SC_R_UART_2, ADMA__LPCG_UART2_IPG_CLK_BASE),
273 kCLOCK_DMA_Lpuart3 = LPCG_TUPLE(SC_R_UART_3, ADMA__LPCG_UART3_IPG_CLK_BASE),
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8QX6/drivers/
Dfsl_clock.h251 #define LPCG_TUPLE(rsrc, base) ((uint32_t)((((base) >> 12U) << 10U) | (rsrc))) macro
265 kCLOCK_M4_0_Irqsteer = LPCG_TUPLE(SC_R_IRQSTR_M4_0, NV),
266 kCLOCK_DMA_Lpspi0 = LPCG_TUPLE(SC_R_SPI_0, ADMA__LPCG_SPI0_IPG_CLK_BASE),
267 kCLOCK_DMA_Lpspi1 = LPCG_TUPLE(SC_R_SPI_1, ADMA__LPCG_SPI1_IPG_CLK_BASE),
268 kCLOCK_DMA_Lpspi2 = LPCG_TUPLE(SC_R_SPI_2, ADMA__LPCG_SPI2_IPG_CLK_BASE),
269 kCLOCK_DMA_Lpspi3 = LPCG_TUPLE(SC_R_SPI_3, ADMA__LPCG_SPI3_IPG_CLK_BASE),
270 kCLOCK_DMA_Lpuart0 = LPCG_TUPLE(SC_R_UART_0, ADMA__LPCG_UART0_IPG_CLK_BASE),
271 kCLOCK_DMA_Lpuart1 = LPCG_TUPLE(SC_R_UART_1, ADMA__LPCG_UART1_IPG_CLK_BASE),
272 kCLOCK_DMA_Lpuart2 = LPCG_TUPLE(SC_R_UART_2, ADMA__LPCG_UART2_IPG_CLK_BASE),
273 kCLOCK_DMA_Lpuart3 = LPCG_TUPLE(SC_R_UART_3, ADMA__LPCG_UART3_IPG_CLK_BASE),
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8UX6/drivers/
Dfsl_clock.h251 #define LPCG_TUPLE(rsrc, base) ((uint32_t)((((base) >> 12U) << 10U) | (rsrc))) macro
265 kCLOCK_M4_0_Irqsteer = LPCG_TUPLE(SC_R_IRQSTR_M4_0, NV),
266 kCLOCK_DMA_Lpspi0 = LPCG_TUPLE(SC_R_SPI_0, ADMA__LPCG_SPI0_IPG_CLK_BASE),
267 kCLOCK_DMA_Lpspi1 = LPCG_TUPLE(SC_R_SPI_1, ADMA__LPCG_SPI1_IPG_CLK_BASE),
268 kCLOCK_DMA_Lpspi2 = LPCG_TUPLE(SC_R_SPI_2, ADMA__LPCG_SPI2_IPG_CLK_BASE),
269 kCLOCK_DMA_Lpspi3 = LPCG_TUPLE(SC_R_SPI_3, ADMA__LPCG_SPI3_IPG_CLK_BASE),
270 kCLOCK_DMA_Lpuart0 = LPCG_TUPLE(SC_R_UART_0, ADMA__LPCG_UART0_IPG_CLK_BASE),
271 kCLOCK_DMA_Lpuart1 = LPCG_TUPLE(SC_R_UART_1, ADMA__LPCG_UART1_IPG_CLK_BASE),
272 kCLOCK_DMA_Lpuart2 = LPCG_TUPLE(SC_R_UART_2, ADMA__LPCG_UART2_IPG_CLK_BASE),
273 kCLOCK_DMA_Lpuart3 = LPCG_TUPLE(SC_R_UART_3, ADMA__LPCG_UART3_IPG_CLK_BASE),
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8DX1/drivers/
Dfsl_clock.h251 #define LPCG_TUPLE(rsrc, base) ((uint32_t)((((base) >> 12U) << 10U) | (rsrc))) macro
265 kCLOCK_M4_0_Irqsteer = LPCG_TUPLE(SC_R_IRQSTR_M4_0, NV),
266 kCLOCK_DMA_Lpspi0 = LPCG_TUPLE(SC_R_SPI_0, ADMA__LPCG_SPI0_IPG_CLK_BASE),
267 kCLOCK_DMA_Lpspi1 = LPCG_TUPLE(SC_R_SPI_1, ADMA__LPCG_SPI1_IPG_CLK_BASE),
268 kCLOCK_DMA_Lpspi2 = LPCG_TUPLE(SC_R_SPI_2, ADMA__LPCG_SPI2_IPG_CLK_BASE),
269 kCLOCK_DMA_Lpspi3 = LPCG_TUPLE(SC_R_SPI_3, ADMA__LPCG_SPI3_IPG_CLK_BASE),
270 kCLOCK_DMA_Lpuart0 = LPCG_TUPLE(SC_R_UART_0, ADMA__LPCG_UART0_IPG_CLK_BASE),
271 kCLOCK_DMA_Lpuart1 = LPCG_TUPLE(SC_R_UART_1, ADMA__LPCG_UART1_IPG_CLK_BASE),
272 kCLOCK_DMA_Lpuart2 = LPCG_TUPLE(SC_R_UART_2, ADMA__LPCG_UART2_IPG_CLK_BASE),
273 kCLOCK_DMA_Lpuart3 = LPCG_TUPLE(SC_R_UART_3, ADMA__LPCG_UART3_IPG_CLK_BASE),
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8DX3/drivers/
Dfsl_clock.h251 #define LPCG_TUPLE(rsrc, base) ((uint32_t)((((base) >> 12U) << 10U) | (rsrc))) macro
265 kCLOCK_M4_0_Irqsteer = LPCG_TUPLE(SC_R_IRQSTR_M4_0, NV),
266 kCLOCK_DMA_Lpspi0 = LPCG_TUPLE(SC_R_SPI_0, ADMA__LPCG_SPI0_IPG_CLK_BASE),
267 kCLOCK_DMA_Lpspi1 = LPCG_TUPLE(SC_R_SPI_1, ADMA__LPCG_SPI1_IPG_CLK_BASE),
268 kCLOCK_DMA_Lpspi2 = LPCG_TUPLE(SC_R_SPI_2, ADMA__LPCG_SPI2_IPG_CLK_BASE),
269 kCLOCK_DMA_Lpspi3 = LPCG_TUPLE(SC_R_SPI_3, ADMA__LPCG_SPI3_IPG_CLK_BASE),
270 kCLOCK_DMA_Lpuart0 = LPCG_TUPLE(SC_R_UART_0, ADMA__LPCG_UART0_IPG_CLK_BASE),
271 kCLOCK_DMA_Lpuart1 = LPCG_TUPLE(SC_R_UART_1, ADMA__LPCG_UART1_IPG_CLK_BASE),
272 kCLOCK_DMA_Lpuart2 = LPCG_TUPLE(SC_R_UART_2, ADMA__LPCG_UART2_IPG_CLK_BASE),
273 kCLOCK_DMA_Lpuart3 = LPCG_TUPLE(SC_R_UART_3, ADMA__LPCG_UART3_IPG_CLK_BASE),
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8DX2/drivers/
Dfsl_clock.h251 #define LPCG_TUPLE(rsrc, base) ((uint32_t)((((base) >> 12U) << 10U) | (rsrc))) macro
265 kCLOCK_M4_0_Irqsteer = LPCG_TUPLE(SC_R_IRQSTR_M4_0, NV),
266 kCLOCK_DMA_Lpspi0 = LPCG_TUPLE(SC_R_SPI_0, ADMA__LPCG_SPI0_IPG_CLK_BASE),
267 kCLOCK_DMA_Lpspi1 = LPCG_TUPLE(SC_R_SPI_1, ADMA__LPCG_SPI1_IPG_CLK_BASE),
268 kCLOCK_DMA_Lpspi2 = LPCG_TUPLE(SC_R_SPI_2, ADMA__LPCG_SPI2_IPG_CLK_BASE),
269 kCLOCK_DMA_Lpspi3 = LPCG_TUPLE(SC_R_SPI_3, ADMA__LPCG_SPI3_IPG_CLK_BASE),
270 kCLOCK_DMA_Lpuart0 = LPCG_TUPLE(SC_R_UART_0, ADMA__LPCG_UART0_IPG_CLK_BASE),
271 kCLOCK_DMA_Lpuart1 = LPCG_TUPLE(SC_R_UART_1, ADMA__LPCG_UART1_IPG_CLK_BASE),
272 kCLOCK_DMA_Lpuart2 = LPCG_TUPLE(SC_R_UART_2, ADMA__LPCG_UART2_IPG_CLK_BASE),
273 kCLOCK_DMA_Lpuart3 = LPCG_TUPLE(SC_R_UART_3, ADMA__LPCG_UART3_IPG_CLK_BASE),
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8DX5/drivers/
Dfsl_clock.h251 #define LPCG_TUPLE(rsrc, base) ((uint32_t)((((base) >> 12U) << 10U) | (rsrc))) macro
265 kCLOCK_M4_0_Irqsteer = LPCG_TUPLE(SC_R_IRQSTR_M4_0, NV),
266 kCLOCK_DMA_Lpspi0 = LPCG_TUPLE(SC_R_SPI_0, ADMA__LPCG_SPI0_IPG_CLK_BASE),
267 kCLOCK_DMA_Lpspi1 = LPCG_TUPLE(SC_R_SPI_1, ADMA__LPCG_SPI1_IPG_CLK_BASE),
268 kCLOCK_DMA_Lpspi2 = LPCG_TUPLE(SC_R_SPI_2, ADMA__LPCG_SPI2_IPG_CLK_BASE),
269 kCLOCK_DMA_Lpspi3 = LPCG_TUPLE(SC_R_SPI_3, ADMA__LPCG_SPI3_IPG_CLK_BASE),
270 kCLOCK_DMA_Lpuart0 = LPCG_TUPLE(SC_R_UART_0, ADMA__LPCG_UART0_IPG_CLK_BASE),
271 kCLOCK_DMA_Lpuart1 = LPCG_TUPLE(SC_R_UART_1, ADMA__LPCG_UART1_IPG_CLK_BASE),
272 kCLOCK_DMA_Lpuart2 = LPCG_TUPLE(SC_R_UART_2, ADMA__LPCG_UART2_IPG_CLK_BASE),
273 kCLOCK_DMA_Lpuart3 = LPCG_TUPLE(SC_R_UART_3, ADMA__LPCG_UART3_IPG_CLK_BASE),
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8QX1/drivers/
Dfsl_clock.h251 #define LPCG_TUPLE(rsrc, base) ((uint32_t)((((base) >> 12U) << 10U) | (rsrc))) macro
265 kCLOCK_M4_0_Irqsteer = LPCG_TUPLE(SC_R_IRQSTR_M4_0, NV),
266 kCLOCK_DMA_Lpspi0 = LPCG_TUPLE(SC_R_SPI_0, ADMA__LPCG_SPI0_IPG_CLK_BASE),
267 kCLOCK_DMA_Lpspi1 = LPCG_TUPLE(SC_R_SPI_1, ADMA__LPCG_SPI1_IPG_CLK_BASE),
268 kCLOCK_DMA_Lpspi2 = LPCG_TUPLE(SC_R_SPI_2, ADMA__LPCG_SPI2_IPG_CLK_BASE),
269 kCLOCK_DMA_Lpspi3 = LPCG_TUPLE(SC_R_SPI_3, ADMA__LPCG_SPI3_IPG_CLK_BASE),
270 kCLOCK_DMA_Lpuart0 = LPCG_TUPLE(SC_R_UART_0, ADMA__LPCG_UART0_IPG_CLK_BASE),
271 kCLOCK_DMA_Lpuart1 = LPCG_TUPLE(SC_R_UART_1, ADMA__LPCG_UART1_IPG_CLK_BASE),
272 kCLOCK_DMA_Lpuart2 = LPCG_TUPLE(SC_R_UART_2, ADMA__LPCG_UART2_IPG_CLK_BASE),
273 kCLOCK_DMA_Lpuart3 = LPCG_TUPLE(SC_R_UART_3, ADMA__LPCG_UART3_IPG_CLK_BASE),
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8DX4/drivers/
Dfsl_clock.h251 #define LPCG_TUPLE(rsrc, base) ((uint32_t)((((base) >> 12U) << 10U) | (rsrc))) macro
265 kCLOCK_M4_0_Irqsteer = LPCG_TUPLE(SC_R_IRQSTR_M4_0, NV),
266 kCLOCK_DMA_Lpspi0 = LPCG_TUPLE(SC_R_SPI_0, ADMA__LPCG_SPI0_IPG_CLK_BASE),
267 kCLOCK_DMA_Lpspi1 = LPCG_TUPLE(SC_R_SPI_1, ADMA__LPCG_SPI1_IPG_CLK_BASE),
268 kCLOCK_DMA_Lpspi2 = LPCG_TUPLE(SC_R_SPI_2, ADMA__LPCG_SPI2_IPG_CLK_BASE),
269 kCLOCK_DMA_Lpspi3 = LPCG_TUPLE(SC_R_SPI_3, ADMA__LPCG_SPI3_IPG_CLK_BASE),
270 kCLOCK_DMA_Lpuart0 = LPCG_TUPLE(SC_R_UART_0, ADMA__LPCG_UART0_IPG_CLK_BASE),
271 kCLOCK_DMA_Lpuart1 = LPCG_TUPLE(SC_R_UART_1, ADMA__LPCG_UART1_IPG_CLK_BASE),
272 kCLOCK_DMA_Lpuart2 = LPCG_TUPLE(SC_R_UART_2, ADMA__LPCG_UART2_IPG_CLK_BASE),
273 kCLOCK_DMA_Lpuart3 = LPCG_TUPLE(SC_R_UART_3, ADMA__LPCG_UART3_IPG_CLK_BASE),
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8QX2/drivers/
Dfsl_clock.h251 #define LPCG_TUPLE(rsrc, base) ((uint32_t)((((base) >> 12U) << 10U) | (rsrc))) macro
265 kCLOCK_M4_0_Irqsteer = LPCG_TUPLE(SC_R_IRQSTR_M4_0, NV),
266 kCLOCK_DMA_Lpspi0 = LPCG_TUPLE(SC_R_SPI_0, ADMA__LPCG_SPI0_IPG_CLK_BASE),
267 kCLOCK_DMA_Lpspi1 = LPCG_TUPLE(SC_R_SPI_1, ADMA__LPCG_SPI1_IPG_CLK_BASE),
268 kCLOCK_DMA_Lpspi2 = LPCG_TUPLE(SC_R_SPI_2, ADMA__LPCG_SPI2_IPG_CLK_BASE),
269 kCLOCK_DMA_Lpspi3 = LPCG_TUPLE(SC_R_SPI_3, ADMA__LPCG_SPI3_IPG_CLK_BASE),
270 kCLOCK_DMA_Lpuart0 = LPCG_TUPLE(SC_R_UART_0, ADMA__LPCG_UART0_IPG_CLK_BASE),
271 kCLOCK_DMA_Lpuart1 = LPCG_TUPLE(SC_R_UART_1, ADMA__LPCG_UART1_IPG_CLK_BASE),
272 kCLOCK_DMA_Lpuart2 = LPCG_TUPLE(SC_R_UART_2, ADMA__LPCG_UART2_IPG_CLK_BASE),
273 kCLOCK_DMA_Lpuart3 = LPCG_TUPLE(SC_R_UART_3, ADMA__LPCG_UART3_IPG_CLK_BASE),
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8DX6/drivers/
Dfsl_clock.h251 #define LPCG_TUPLE(rsrc, base) ((uint32_t)((((base) >> 12U) << 10U) | (rsrc))) macro
265 kCLOCK_M4_0_Irqsteer = LPCG_TUPLE(SC_R_IRQSTR_M4_0, NV),
266 kCLOCK_DMA_Lpspi0 = LPCG_TUPLE(SC_R_SPI_0, ADMA__LPCG_SPI0_IPG_CLK_BASE),
267 kCLOCK_DMA_Lpspi1 = LPCG_TUPLE(SC_R_SPI_1, ADMA__LPCG_SPI1_IPG_CLK_BASE),
268 kCLOCK_DMA_Lpspi2 = LPCG_TUPLE(SC_R_SPI_2, ADMA__LPCG_SPI2_IPG_CLK_BASE),
269 kCLOCK_DMA_Lpspi3 = LPCG_TUPLE(SC_R_SPI_3, ADMA__LPCG_SPI3_IPG_CLK_BASE),
270 kCLOCK_DMA_Lpuart0 = LPCG_TUPLE(SC_R_UART_0, ADMA__LPCG_UART0_IPG_CLK_BASE),
271 kCLOCK_DMA_Lpuart1 = LPCG_TUPLE(SC_R_UART_1, ADMA__LPCG_UART1_IPG_CLK_BASE),
272 kCLOCK_DMA_Lpuart2 = LPCG_TUPLE(SC_R_UART_2, ADMA__LPCG_UART2_IPG_CLK_BASE),
273 kCLOCK_DMA_Lpuart3 = LPCG_TUPLE(SC_R_UART_3, ADMA__LPCG_UART3_IPG_CLK_BASE),
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8QM6/drivers/
Dfsl_clock.h248 #define LPCG_TUPLE(rsrc, base) ((uint32_t)((((base) >> 12U) << 10U) | (rsrc))) macro
262 kCLOCK_M4_0_Irqsteer = LPCG_TUPLE(SC_R_IRQSTR_M4_0, NV),
263 kCLOCK_M4_1_Irqsteer = LPCG_TUPLE(SC_R_IRQSTR_M4_1, NV),
264 kCLOCK_DMA_Lpspi0 = LPCG_TUPLE(SC_R_SPI_0, DMA__LPCG_LPSPI0_BASE),
265 kCLOCK_DMA_Lpspi1 = LPCG_TUPLE(SC_R_SPI_1, DMA__LPCG_LPSPI1_BASE),
266 kCLOCK_DMA_Lpspi2 = LPCG_TUPLE(SC_R_SPI_2, DMA__LPCG_LPSPI2_BASE),
267 kCLOCK_DMA_Lpspi3 = LPCG_TUPLE(SC_R_SPI_3, DMA__LPCG_LPSPI3_BASE),
268 kCLOCK_DMA_Lpuart0 = LPCG_TUPLE(SC_R_UART_0, DMA__LPCG_LPUART0_BASE),
269 kCLOCK_DMA_Lpuart1 = LPCG_TUPLE(SC_R_UART_1, DMA__LPCG_LPUART1_BASE),
270 kCLOCK_DMA_Lpuart2 = LPCG_TUPLE(SC_R_UART_2, DMA__LPCG_LPUART2_BASE),
[all …]