Searched refs:INTREN (Results 1 – 13 of 13) sorted by relevance
| /hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC55S66/ |
| D | LPC55S66_cm33_core1.h | 15789 __IO uint32_t INTREN; /**< INTERRUPT enable register, offset: 0x190 */ member
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| D | LPC55S66_cm33_core0.h | 15789 __IO uint32_t INTREN; /**< INTERRUPT enable register, offset: 0x190 */ member
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| /hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC55S69/ |
| D | LPC55S69_cm33_core0.h | 15789 __IO uint32_t INTREN; /**< INTERRUPT enable register, offset: 0x190 */ member
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| D | LPC55S69_cm33_core1.h | 15789 __IO uint32_t INTREN; /**< INTERRUPT enable register, offset: 0x190 */ member
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| /hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT633S/ |
| D | MIMXRT633S.h | 25441 __IO uint32_t INTREN; /**< INTERRUPT enable register, offset: 0x190 */ member
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| /hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT685S/ |
| D | MIMXRT685S_cm33.h | 25441 __IO uint32_t INTREN; /**< INTERRUPT enable register, offset: 0x190 */ member
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| /hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5536/ |
| D | LPC5536.h | 33011 __IO uint32_t INTREN; /**< Interrupt Enable, offset: 0x190 */ member
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| /hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT595S/ |
| D | MIMXRT595S_dsp.h | 29105 __IO uint32_t INTREN; /**< Interrupt Enable, offset: 0x190 */ member
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| D | MIMXRT595S_cm33.h | 36342 __IO uint32_t INTREN; /**< Interrupt Enable, offset: 0x190 */ member
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| /hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5534/ |
| D | LPC5534.h | 33011 __IO uint32_t INTREN; /**< Interrupt Enable, offset: 0x190 */ member
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| /hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT533S/ |
| D | MIMXRT533S.h | 34715 __IO uint32_t INTREN; /**< Interrupt Enable, offset: 0x190 */ member
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| /hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC55S36/ |
| D | LPC55S36.h | 39971 __IO uint32_t INTREN; /**< Interrupt Enable, offset: 0x190 */ member
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| /hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT555S/ |
| D | MIMXRT555S.h | 36341 __IO uint32_t INTREN; /**< Interrupt Enable, offset: 0x190 */ member
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