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Searched refs:GMAC_DMA_CH0_STATUS_TPS_MASK (Results 1 – 4 of 4) sorted by relevance

/hal_nxp-3.5.0/s32/drivers/s32k3/Eth_GMAC/include/
DGmac_Ip_Types.h136 GMAC_CH_INTERRUPT_TPS = GMAC_DMA_CH0_STATUS_TPS_MASK,
DEmac_Ip_Wrapper.h4689 #define GMAC_DMA_CH0_STATUS_TPS_MASK EMAC_DMA_CH0_STATUS_TPS_MASK macro
/hal_nxp-3.5.0/s32/drivers/s32k3/Eth_GMAC/src/
DGmac_Ip_Hw_Access.c80 …MASK | GMAC_DMA_CH0_STATUS_ETI_MASK | GMAC_DMA_CH0_STATUS_TBU_MASK | GMAC_DMA_CH0_STATUS_TPS_MASK \
DGmac_Ip.c193 #define GMAC_CH_ABNORMAL_INTERRUPTS ((uint32)GMAC_DMA_CH0_STATUS_TPS_MASK | (uint32)GMAC_DMA_CH0_ST…