Searched refs:GMAC_DMA_CH0_STATUS_TI_MASK (Results 1 – 5 of 5) sorted by relevance
189 if ((IP_GMAC_0->DMA_CH0_STATUS & GMAC_DMA_CH0_STATUS_TI_MASK) != 0U) in ISR()331 if ((IP_GMAC_1->DMA_CH0_STATUS & GMAC_DMA_CH0_STATUS_TI_MASK) != 0U) in ISR()
81 | GMAC_DMA_CH0_STATUS_TI_MASK)523 ((StatusFlags & GMAC_DMA_CH0_STATUS_TI_MASK) != 0U)) in GMAC_TxIRQHandler()526 ChBase->DMA_STATUS = GMAC_DMA_CH0_STATUS_TI_MASK; in GMAC_TxIRQHandler()538 ChBase->DMA_STATUS = GMAC_DMA_CH0_STATUS_TI_MASK; in GMAC_TxIRQHandler()
191 #define GMAC_CH_NORMAL_INTERRUPTS ((uint32)GMAC_DMA_CH0_STATUS_TI_MASK | (uint32)GMAC_DMA_CH0_STA…
135 GMAC_CH_INTERRUPT_TI = GMAC_DMA_CH0_STATUS_TI_MASK,
4685 #define GMAC_DMA_CH0_STATUS_TI_MASK EMAC_DMA_CH0_STATUS_TI_MASK macro