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Searched refs:FXAS21002_CTRL_REG1_DR_MASK (Results 1 – 9 of 9) sorted by relevance

/hal_nxp-3.5.0/mcux/mcux-sdk/middleware/issdk/driverexamples/fxas21002/
Dfxas21002_poll.c34 {FXAS21002_CTRL_REG1, FXAS21002_CTRL_REG1_DR_12_5HZ, FXAS21002_CTRL_REG1_DR_MASK},
Dfxas21002_poll_spi.c40 {FXAS21002_CTRL_REG1, FXAS21002_CTRL_REG1_DR_12_5HZ, FXAS21002_CTRL_REG1_DR_MASK},
Dfxas21002_interrupt.c41 {FXAS21002_CTRL_REG1, FXAS21002_CTRL_REG1_DR_12_5HZ, FXAS21002_CTRL_REG1_DR_MASK},
Dfxas21002_fifo.c43 {FXAS21002_CTRL_REG1, FXAS21002_CTRL_REG1_DR_12_5HZ, FXAS21002_CTRL_REG1_DR_MASK},
/hal_nxp-3.5.0/mcux/mcux-sdk/middleware/issdk/driverexamples/demos/
Dfxas21002_poll_demo.c67 {FXAS21002_CTRL_REG1, FXAS21002_CTRL_REG1_DR_12_5HZ, FXAS21002_CTRL_REG1_DR_MASK},
Dfxas21002_demo.c67 {FXAS21002_CTRL_REG1, FXAS21002_CTRL_REG1_DR_12_5HZ, FXAS21002_CTRL_REG1_DR_MASK},
Ddata_logger_demo.c94 {FXAS21002_CTRL_REG1, FXAS21002_CTRL_REG1_DR_200HZ, FXAS21002_CTRL_REG1_DR_MASK},
Ddemo_11_axis_mult2b.c127 {FXAS21002_CTRL_REG1, FXAS21002_CTRL_REG1_DR_25HZ, FXAS21002_CTRL_REG1_DR_MASK},
/hal_nxp-3.5.0/mcux/mcux-sdk/middleware/issdk/sensors/
Dfxas21002.h684 #define FXAS21002_CTRL_REG1_DR_MASK ((uint8_t) 0x1C) macro