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Searched refs:ENA_SHIFT (Results 1 – 25 of 28) sorted by relevance

12

/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT685S/drivers/
Dfsl_inputmux_connections.h44 #define ENA_SHIFT 8U macro
421 kINPUTMUX_Dmac0InputTriggerPint0Ena = 0U + (DMA0_ITRIG_EN0_ID << ENA_SHIFT),
422 kINPUTMUX_Dmac0InputTriggerPint1Ena = 1U + (DMA0_ITRIG_EN0_ID << ENA_SHIFT),
423 kINPUTMUX_Dmac0InputTriggerPint2Ena = 2U + (DMA0_ITRIG_EN0_ID << ENA_SHIFT),
424 kINPUTMUX_Dmac0InputTriggerPint3Ena = 3U + (DMA0_ITRIG_EN0_ID << ENA_SHIFT),
425 kINPUTMUX_Dmac0InputTriggerCtimer0M0Ena = 4U + (DMA0_ITRIG_EN0_ID << ENA_SHIFT),
426 kINPUTMUX_Dmac0InputTriggerCtimer0M1Ena = 5U + (DMA0_ITRIG_EN0_ID << ENA_SHIFT),
427 kINPUTMUX_Dmac0InputTriggerCtimer1M0Ena = 6U + (DMA0_ITRIG_EN0_ID << ENA_SHIFT),
428 kINPUTMUX_Dmac0InputTriggerCtimer1M1Ena = 7U + (DMA0_ITRIG_EN0_ID << ENA_SHIFT),
429 kINPUTMUX_Dmac0InputTriggerCtimer2M0Ena = 8U + (DMA0_ITRIG_EN0_ID << ENA_SHIFT),
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT633S/drivers/
Dfsl_inputmux_connections.h44 #define ENA_SHIFT 8U macro
421 kINPUTMUX_Dmac0InputTriggerPint0Ena = 0U + (DMA0_ITRIG_EN0_ID << ENA_SHIFT),
422 kINPUTMUX_Dmac0InputTriggerPint1Ena = 1U + (DMA0_ITRIG_EN0_ID << ENA_SHIFT),
423 kINPUTMUX_Dmac0InputTriggerPint2Ena = 2U + (DMA0_ITRIG_EN0_ID << ENA_SHIFT),
424 kINPUTMUX_Dmac0InputTriggerPint3Ena = 3U + (DMA0_ITRIG_EN0_ID << ENA_SHIFT),
425 kINPUTMUX_Dmac0InputTriggerCtimer0M0Ena = 4U + (DMA0_ITRIG_EN0_ID << ENA_SHIFT),
426 kINPUTMUX_Dmac0InputTriggerCtimer0M1Ena = 5U + (DMA0_ITRIG_EN0_ID << ENA_SHIFT),
427 kINPUTMUX_Dmac0InputTriggerCtimer1M0Ena = 6U + (DMA0_ITRIG_EN0_ID << ENA_SHIFT),
428 kINPUTMUX_Dmac0InputTriggerCtimer1M1Ena = 7U + (DMA0_ITRIG_EN0_ID << ENA_SHIFT),
429 kINPUTMUX_Dmac0InputTriggerCtimer2M0Ena = 8U + (DMA0_ITRIG_EN0_ID << ENA_SHIFT),
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT595S/drivers/
Dfsl_inputmux_connections.h47 #define ENA_SHIFT 5U macro
531 kINPUTMUX_Dmac0InputTriggerPint0Ena = 0U + (DMA0_ITRIG_EN0_ID << ENA_SHIFT),
532 kINPUTMUX_Dmac0InputTriggerPint1Ena = 1U + (DMA0_ITRIG_EN0_ID << ENA_SHIFT),
533 kINPUTMUX_Dmac0InputTriggerPint2Ena = 2U + (DMA0_ITRIG_EN0_ID << ENA_SHIFT),
534 kINPUTMUX_Dmac0InputTriggerPint3Ena = 3U + (DMA0_ITRIG_EN0_ID << ENA_SHIFT),
535 kINPUTMUX_Dmac0InputTriggerCtimer0M0Ena = 4U + (DMA0_ITRIG_EN0_ID << ENA_SHIFT),
536 kINPUTMUX_Dmac0InputTriggerCtimer0M1Ena = 5U + (DMA0_ITRIG_EN0_ID << ENA_SHIFT),
537 kINPUTMUX_Dmac0InputTriggerCtimer1M0Ena = 6U + (DMA0_ITRIG_EN0_ID << ENA_SHIFT),
538 kINPUTMUX_Dmac0InputTriggerCtimer1M1Ena = 7U + (DMA0_ITRIG_EN0_ID << ENA_SHIFT),
539 kINPUTMUX_Dmac0InputTriggerCtimer2M0Ena = 8U + (DMA0_ITRIG_EN0_ID << ENA_SHIFT),
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT555S/drivers/
Dfsl_inputmux_connections.h47 #define ENA_SHIFT 5U macro
531 kINPUTMUX_Dmac0InputTriggerPint0Ena = 0U + (DMA0_ITRIG_EN0_ID << ENA_SHIFT),
532 kINPUTMUX_Dmac0InputTriggerPint1Ena = 1U + (DMA0_ITRIG_EN0_ID << ENA_SHIFT),
533 kINPUTMUX_Dmac0InputTriggerPint2Ena = 2U + (DMA0_ITRIG_EN0_ID << ENA_SHIFT),
534 kINPUTMUX_Dmac0InputTriggerPint3Ena = 3U + (DMA0_ITRIG_EN0_ID << ENA_SHIFT),
535 kINPUTMUX_Dmac0InputTriggerCtimer0M0Ena = 4U + (DMA0_ITRIG_EN0_ID << ENA_SHIFT),
536 kINPUTMUX_Dmac0InputTriggerCtimer0M1Ena = 5U + (DMA0_ITRIG_EN0_ID << ENA_SHIFT),
537 kINPUTMUX_Dmac0InputTriggerCtimer1M0Ena = 6U + (DMA0_ITRIG_EN0_ID << ENA_SHIFT),
538 kINPUTMUX_Dmac0InputTriggerCtimer1M1Ena = 7U + (DMA0_ITRIG_EN0_ID << ENA_SHIFT),
539 kINPUTMUX_Dmac0InputTriggerCtimer2M0Ena = 8U + (DMA0_ITRIG_EN0_ID << ENA_SHIFT),
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT533S/drivers/
Dfsl_inputmux_connections.h47 #define ENA_SHIFT 5U macro
531 kINPUTMUX_Dmac0InputTriggerPint0Ena = 0U + (DMA0_ITRIG_EN0_ID << ENA_SHIFT),
532 kINPUTMUX_Dmac0InputTriggerPint1Ena = 1U + (DMA0_ITRIG_EN0_ID << ENA_SHIFT),
533 kINPUTMUX_Dmac0InputTriggerPint2Ena = 2U + (DMA0_ITRIG_EN0_ID << ENA_SHIFT),
534 kINPUTMUX_Dmac0InputTriggerPint3Ena = 3U + (DMA0_ITRIG_EN0_ID << ENA_SHIFT),
535 kINPUTMUX_Dmac0InputTriggerCtimer0M0Ena = 4U + (DMA0_ITRIG_EN0_ID << ENA_SHIFT),
536 kINPUTMUX_Dmac0InputTriggerCtimer0M1Ena = 5U + (DMA0_ITRIG_EN0_ID << ENA_SHIFT),
537 kINPUTMUX_Dmac0InputTriggerCtimer1M0Ena = 6U + (DMA0_ITRIG_EN0_ID << ENA_SHIFT),
538 kINPUTMUX_Dmac0InputTriggerCtimer1M1Ena = 7U + (DMA0_ITRIG_EN0_ID << ENA_SHIFT),
539 kINPUTMUX_Dmac0InputTriggerCtimer2M0Ena = 8U + (DMA0_ITRIG_EN0_ID << ENA_SHIFT),
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC55S06/drivers/
Dfsl_inputmux_connections.h50 #define ENA_SHIFT 8U macro
390 kINPUTMUX_HashCryptToDmac0Ch0RequestEna = 0U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
391 kINPUTMUX_Flexcomm8RxToDmac0Ch2RequestEna = 2U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
392 kINPUTMUX_Flexcomm8TxToDmac0Ch3RequestEna = 3U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
393 kINPUTMUX_Flexcomm0RxToDmac0Ch4RequestEna = 4U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
394 kINPUTMUX_Flexcomm0TxToDmac0Ch5RequestEna = 5U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
395 kINPUTMUX_Flexcomm1RxToDmac0Ch6RequestEna = 6U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
396 kINPUTMUX_Flexcomm1TxToDmac0Ch7RequestEna = 7U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
397 kINPUTMUX_Flexcomm3RxToDmac0Ch8RequestEna = 8U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
398 kINPUTMUX_Flexcomm3TxToDmac0Ch9RequestEna = 9U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5506/drivers/
Dfsl_inputmux_connections.h50 #define ENA_SHIFT 8U macro
390 kINPUTMUX_HashCryptToDmac0Ch0RequestEna = 0U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
391 kINPUTMUX_Flexcomm8RxToDmac0Ch2RequestEna = 2U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
392 kINPUTMUX_Flexcomm8TxToDmac0Ch3RequestEna = 3U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
393 kINPUTMUX_Flexcomm0RxToDmac0Ch4RequestEna = 4U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
394 kINPUTMUX_Flexcomm0TxToDmac0Ch5RequestEna = 5U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
395 kINPUTMUX_Flexcomm1RxToDmac0Ch6RequestEna = 6U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
396 kINPUTMUX_Flexcomm1TxToDmac0Ch7RequestEna = 7U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
397 kINPUTMUX_Flexcomm3RxToDmac0Ch8RequestEna = 8U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
398 kINPUTMUX_Flexcomm3TxToDmac0Ch9RequestEna = 9U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC55S04/drivers/
Dfsl_inputmux_connections.h50 #define ENA_SHIFT 8U macro
390 kINPUTMUX_HashCryptToDmac0Ch0RequestEna = 0U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
391 kINPUTMUX_Flexcomm8RxToDmac0Ch2RequestEna = 2U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
392 kINPUTMUX_Flexcomm8TxToDmac0Ch3RequestEna = 3U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
393 kINPUTMUX_Flexcomm0RxToDmac0Ch4RequestEna = 4U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
394 kINPUTMUX_Flexcomm0TxToDmac0Ch5RequestEna = 5U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
395 kINPUTMUX_Flexcomm1RxToDmac0Ch6RequestEna = 6U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
396 kINPUTMUX_Flexcomm1TxToDmac0Ch7RequestEna = 7U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
397 kINPUTMUX_Flexcomm3RxToDmac0Ch8RequestEna = 8U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
398 kINPUTMUX_Flexcomm3TxToDmac0Ch9RequestEna = 9U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5502CPXXXX/drivers/
Dfsl_inputmux_connections.h50 #define ENA_SHIFT 8U macro
390 kINPUTMUX_HashCryptToDmac0Ch0RequestEna = 0U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
391 kINPUTMUX_Flexcomm8RxToDmac0Ch2RequestEna = 2U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
392 kINPUTMUX_Flexcomm8TxToDmac0Ch3RequestEna = 3U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
393 kINPUTMUX_Flexcomm0RxToDmac0Ch4RequestEna = 4U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
394 kINPUTMUX_Flexcomm0TxToDmac0Ch5RequestEna = 5U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
395 kINPUTMUX_Flexcomm1RxToDmac0Ch6RequestEna = 6U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
396 kINPUTMUX_Flexcomm1TxToDmac0Ch7RequestEna = 7U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
397 kINPUTMUX_Flexcomm3RxToDmac0Ch8RequestEna = 8U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
398 kINPUTMUX_Flexcomm3TxToDmac0Ch9RequestEna = 9U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5504CPXXXX/drivers/
Dfsl_inputmux_connections.h50 #define ENA_SHIFT 8U macro
390 kINPUTMUX_HashCryptToDmac0Ch0RequestEna = 0U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
391 kINPUTMUX_Flexcomm8RxToDmac0Ch2RequestEna = 2U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
392 kINPUTMUX_Flexcomm8TxToDmac0Ch3RequestEna = 3U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
393 kINPUTMUX_Flexcomm0RxToDmac0Ch4RequestEna = 4U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
394 kINPUTMUX_Flexcomm0TxToDmac0Ch5RequestEna = 5U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
395 kINPUTMUX_Flexcomm1RxToDmac0Ch6RequestEna = 6U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
396 kINPUTMUX_Flexcomm1TxToDmac0Ch7RequestEna = 7U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
397 kINPUTMUX_Flexcomm3RxToDmac0Ch8RequestEna = 8U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
398 kINPUTMUX_Flexcomm3TxToDmac0Ch9RequestEna = 9U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5504/drivers/
Dfsl_inputmux_connections.h50 #define ENA_SHIFT 8U macro
390 kINPUTMUX_HashCryptToDmac0Ch0RequestEna = 0U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
391 kINPUTMUX_Flexcomm8RxToDmac0Ch2RequestEna = 2U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
392 kINPUTMUX_Flexcomm8TxToDmac0Ch3RequestEna = 3U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
393 kINPUTMUX_Flexcomm0RxToDmac0Ch4RequestEna = 4U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
394 kINPUTMUX_Flexcomm0TxToDmac0Ch5RequestEna = 5U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
395 kINPUTMUX_Flexcomm1RxToDmac0Ch6RequestEna = 6U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
396 kINPUTMUX_Flexcomm1TxToDmac0Ch7RequestEna = 7U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
397 kINPUTMUX_Flexcomm3RxToDmac0Ch8RequestEna = 8U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
398 kINPUTMUX_Flexcomm3TxToDmac0Ch9RequestEna = 9U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5506CPXXXX/drivers/
Dfsl_inputmux_connections.h50 #define ENA_SHIFT 8U macro
390 kINPUTMUX_HashCryptToDmac0Ch0RequestEna = 0U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
391 kINPUTMUX_Flexcomm8RxToDmac0Ch2RequestEna = 2U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
392 kINPUTMUX_Flexcomm8TxToDmac0Ch3RequestEna = 3U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
393 kINPUTMUX_Flexcomm0RxToDmac0Ch4RequestEna = 4U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
394 kINPUTMUX_Flexcomm0TxToDmac0Ch5RequestEna = 5U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
395 kINPUTMUX_Flexcomm1RxToDmac0Ch6RequestEna = 6U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
396 kINPUTMUX_Flexcomm1TxToDmac0Ch7RequestEna = 7U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
397 kINPUTMUX_Flexcomm3RxToDmac0Ch8RequestEna = 8U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
398 kINPUTMUX_Flexcomm3TxToDmac0Ch9RequestEna = 9U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5502/drivers/
Dfsl_inputmux_connections.h50 #define ENA_SHIFT 8U macro
390 kINPUTMUX_HashCryptToDmac0Ch0RequestEna = 0U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
391 kINPUTMUX_Flexcomm8RxToDmac0Ch2RequestEna = 2U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
392 kINPUTMUX_Flexcomm8TxToDmac0Ch3RequestEna = 3U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
393 kINPUTMUX_Flexcomm0RxToDmac0Ch4RequestEna = 4U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
394 kINPUTMUX_Flexcomm0TxToDmac0Ch5RequestEna = 5U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
395 kINPUTMUX_Flexcomm1RxToDmac0Ch6RequestEna = 6U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
396 kINPUTMUX_Flexcomm1TxToDmac0Ch7RequestEna = 7U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
397 kINPUTMUX_Flexcomm3RxToDmac0Ch8RequestEna = 8U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
398 kINPUTMUX_Flexcomm3TxToDmac0Ch9RequestEna = 9U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5526/drivers/
Dfsl_inputmux_connections.h50 #define ENA_SHIFT 8U macro
417 kINPUTMUX_HashCryptToDmac0Ch0RequestEna = 0U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
418 kINPUTMUX_Flexcomm8RxToDmac0Ch2RequestEna = 2U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
419 kINPUTMUX_Flexcomm8TxToDmac0Ch3RequestEna = 3U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
420 kINPUTMUX_Flexcomm0RxToDmac0Ch4RequestEna = 4U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
421 kINPUTMUX_Flexcomm0TxToDmac0Ch5RequestEna = 5U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
422 kINPUTMUX_Flexcomm1RxToDmac0Ch6RequestEna = 6U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
423 kINPUTMUX_Flexcomm1TxToDmac0Ch7RequestEna = 7U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
424 kINPUTMUX_Flexcomm3RxToDmac0Ch8RequestEna = 8U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
425 kINPUTMUX_Flexcomm3TxToDmac0Ch9RequestEna = 9U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5512/drivers/
Dfsl_inputmux_connections.h50 #define ENA_SHIFT 8U macro
402 kINPUTMUX_HashCryptToDmac0Ch0RequestEna = 0U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
403 kINPUTMUX_Flexcomm8RxToDmac0Ch2RequestEna = 2U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
404 kINPUTMUX_Flexcomm8TxToDmac0Ch3RequestEna = 3U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
405 kINPUTMUX_Flexcomm0RxToDmac0Ch4RequestEna = 4U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
406 kINPUTMUX_Flexcomm0TxToDmac0Ch5RequestEna = 5U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
407 kINPUTMUX_Flexcomm1RxToDmac0Ch6RequestEna = 6U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
408 kINPUTMUX_Flexcomm1TxToDmac0Ch7RequestEna = 7U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
409 kINPUTMUX_Flexcomm3RxToDmac0Ch8RequestEna = 8U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
410 kINPUTMUX_Flexcomm3TxToDmac0Ch9RequestEna = 9U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5528/drivers/
Dfsl_inputmux_connections.h50 #define ENA_SHIFT 8U macro
417 kINPUTMUX_HashCryptToDmac0Ch0RequestEna = 0U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
418 kINPUTMUX_Flexcomm8RxToDmac0Ch2RequestEna = 2U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
419 kINPUTMUX_Flexcomm8TxToDmac0Ch3RequestEna = 3U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
420 kINPUTMUX_Flexcomm0RxToDmac0Ch4RequestEna = 4U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
421 kINPUTMUX_Flexcomm0TxToDmac0Ch5RequestEna = 5U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
422 kINPUTMUX_Flexcomm1RxToDmac0Ch6RequestEna = 6U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
423 kINPUTMUX_Flexcomm1TxToDmac0Ch7RequestEna = 7U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
424 kINPUTMUX_Flexcomm3RxToDmac0Ch8RequestEna = 8U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
425 kINPUTMUX_Flexcomm3TxToDmac0Ch9RequestEna = 9U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC55S69/drivers/
Dfsl_inputmux_connections.h50 #define ENA_SHIFT 8U macro
417 kINPUTMUX_HashCryptToDmac0Ch0RequestEna = 0U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
418 kINPUTMUX_Flexcomm8RxToDmac0Ch2RequestEna = 2U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
419 kINPUTMUX_Flexcomm8TxToDmac0Ch3RequestEna = 3U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
420 kINPUTMUX_Flexcomm0RxToDmac0Ch4RequestEna = 4U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
421 kINPUTMUX_Flexcomm0TxToDmac0Ch5RequestEna = 5U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
422 kINPUTMUX_Flexcomm1RxToDmac0Ch6RequestEna = 6U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
423 kINPUTMUX_Flexcomm1TxToDmac0Ch7RequestEna = 7U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
424 kINPUTMUX_Flexcomm3RxToDmac0Ch8RequestEna = 8U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
425 kINPUTMUX_Flexcomm3TxToDmac0Ch9RequestEna = 9U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC55S26/drivers/
Dfsl_inputmux_connections.h50 #define ENA_SHIFT 8U macro
417 kINPUTMUX_HashCryptToDmac0Ch0RequestEna = 0U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
418 kINPUTMUX_Flexcomm8RxToDmac0Ch2RequestEna = 2U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
419 kINPUTMUX_Flexcomm8TxToDmac0Ch3RequestEna = 3U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
420 kINPUTMUX_Flexcomm0RxToDmac0Ch4RequestEna = 4U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
421 kINPUTMUX_Flexcomm0TxToDmac0Ch5RequestEna = 5U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
422 kINPUTMUX_Flexcomm1RxToDmac0Ch6RequestEna = 6U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
423 kINPUTMUX_Flexcomm1TxToDmac0Ch7RequestEna = 7U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
424 kINPUTMUX_Flexcomm3RxToDmac0Ch8RequestEna = 8U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
425 kINPUTMUX_Flexcomm3TxToDmac0Ch9RequestEna = 9U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC55S28/drivers/
Dfsl_inputmux_connections.h50 #define ENA_SHIFT 8U macro
417 kINPUTMUX_HashCryptToDmac0Ch0RequestEna = 0U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
418 kINPUTMUX_Flexcomm8RxToDmac0Ch2RequestEna = 2U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
419 kINPUTMUX_Flexcomm8TxToDmac0Ch3RequestEna = 3U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
420 kINPUTMUX_Flexcomm0RxToDmac0Ch4RequestEna = 4U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
421 kINPUTMUX_Flexcomm0TxToDmac0Ch5RequestEna = 5U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
422 kINPUTMUX_Flexcomm1RxToDmac0Ch6RequestEna = 6U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
423 kINPUTMUX_Flexcomm1TxToDmac0Ch7RequestEna = 7U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
424 kINPUTMUX_Flexcomm3RxToDmac0Ch8RequestEna = 8U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
425 kINPUTMUX_Flexcomm3TxToDmac0Ch9RequestEna = 9U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC55S16/drivers/
Dfsl_inputmux_connections.h50 #define ENA_SHIFT 8U macro
402 kINPUTMUX_HashCryptToDmac0Ch0RequestEna = 0U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
403 kINPUTMUX_Flexcomm8RxToDmac0Ch2RequestEna = 2U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
404 kINPUTMUX_Flexcomm8TxToDmac0Ch3RequestEna = 3U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
405 kINPUTMUX_Flexcomm0RxToDmac0Ch4RequestEna = 4U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
406 kINPUTMUX_Flexcomm0TxToDmac0Ch5RequestEna = 5U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
407 kINPUTMUX_Flexcomm1RxToDmac0Ch6RequestEna = 6U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
408 kINPUTMUX_Flexcomm1TxToDmac0Ch7RequestEna = 7U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
409 kINPUTMUX_Flexcomm3RxToDmac0Ch8RequestEna = 8U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
410 kINPUTMUX_Flexcomm3TxToDmac0Ch9RequestEna = 9U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC55S14/drivers/
Dfsl_inputmux_connections.h50 #define ENA_SHIFT 8U macro
402 kINPUTMUX_HashCryptToDmac0Ch0RequestEna = 0U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
403 kINPUTMUX_Flexcomm8RxToDmac0Ch2RequestEna = 2U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
404 kINPUTMUX_Flexcomm8TxToDmac0Ch3RequestEna = 3U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
405 kINPUTMUX_Flexcomm0RxToDmac0Ch4RequestEna = 4U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
406 kINPUTMUX_Flexcomm0TxToDmac0Ch5RequestEna = 5U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
407 kINPUTMUX_Flexcomm1RxToDmac0Ch6RequestEna = 6U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
408 kINPUTMUX_Flexcomm1TxToDmac0Ch7RequestEna = 7U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
409 kINPUTMUX_Flexcomm3RxToDmac0Ch8RequestEna = 8U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
410 kINPUTMUX_Flexcomm3TxToDmac0Ch9RequestEna = 9U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC55S66/drivers/
Dfsl_inputmux_connections.h50 #define ENA_SHIFT 8U macro
417 kINPUTMUX_HashCryptToDmac0Ch0RequestEna = 0U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
418 kINPUTMUX_Flexcomm8RxToDmac0Ch2RequestEna = 2U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
419 kINPUTMUX_Flexcomm8TxToDmac0Ch3RequestEna = 3U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
420 kINPUTMUX_Flexcomm0RxToDmac0Ch4RequestEna = 4U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
421 kINPUTMUX_Flexcomm0TxToDmac0Ch5RequestEna = 5U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
422 kINPUTMUX_Flexcomm1RxToDmac0Ch6RequestEna = 6U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
423 kINPUTMUX_Flexcomm1TxToDmac0Ch7RequestEna = 7U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
424 kINPUTMUX_Flexcomm3RxToDmac0Ch8RequestEna = 8U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
425 kINPUTMUX_Flexcomm3TxToDmac0Ch9RequestEna = 9U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5514/drivers/
Dfsl_inputmux_connections.h50 #define ENA_SHIFT 8U macro
402 kINPUTMUX_HashCryptToDmac0Ch0RequestEna = 0U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
403 kINPUTMUX_Flexcomm8RxToDmac0Ch2RequestEna = 2U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
404 kINPUTMUX_Flexcomm8TxToDmac0Ch3RequestEna = 3U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
405 kINPUTMUX_Flexcomm0RxToDmac0Ch4RequestEna = 4U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
406 kINPUTMUX_Flexcomm0TxToDmac0Ch5RequestEna = 5U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
407 kINPUTMUX_Flexcomm1RxToDmac0Ch6RequestEna = 6U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
408 kINPUTMUX_Flexcomm1TxToDmac0Ch7RequestEna = 7U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
409 kINPUTMUX_Flexcomm3RxToDmac0Ch8RequestEna = 8U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
410 kINPUTMUX_Flexcomm3TxToDmac0Ch9RequestEna = 9U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5516/drivers/
Dfsl_inputmux_connections.h50 #define ENA_SHIFT 8U macro
402 kINPUTMUX_HashCryptToDmac0Ch0RequestEna = 0U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
403 kINPUTMUX_Flexcomm8RxToDmac0Ch2RequestEna = 2U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
404 kINPUTMUX_Flexcomm8TxToDmac0Ch3RequestEna = 3U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
405 kINPUTMUX_Flexcomm0RxToDmac0Ch4RequestEna = 4U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
406 kINPUTMUX_Flexcomm0TxToDmac0Ch5RequestEna = 5U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
407 kINPUTMUX_Flexcomm1RxToDmac0Ch6RequestEna = 6U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
408 kINPUTMUX_Flexcomm1TxToDmac0Ch7RequestEna = 7U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
409 kINPUTMUX_Flexcomm3RxToDmac0Ch8RequestEna = 8U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
410 kINPUTMUX_Flexcomm3TxToDmac0Ch9RequestEna = 9U + (DMA0_REQ_ENA_ID << ENA_SHIFT),
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5534/drivers/
Dfsl_inputmux_connections.h90 #define ENA_SHIFT 8U macro
2540 kINPUTMUX_FlexSpiRxToDmac0Ch0RequestEna = 0U + (DMA0_REQ_EN0_ID << ENA_SHIFT),
2541 kINPUTMUX_FlexSpiTxToDmac0Ch1RequestEna = 1U + (DMA0_REQ_EN0_ID << ENA_SHIFT),
2542 kINPUTMUX_PinInt0ToDmac0Ch2RequestEna = 2U + (DMA0_REQ_EN0_ID << ENA_SHIFT),
2543 kINPUTMUX_PinInt1ToDmac0Ch3RequestEna = 3U + (DMA0_REQ_EN0_ID << ENA_SHIFT),
2544 kINPUTMUX_PinInt2ToDmac0Ch4RequestEna = 4U + (DMA0_REQ_EN0_ID << ENA_SHIFT),
2545 kINPUTMUX_PinInt3ToDmac0Ch5RequestEna = 5U + (DMA0_REQ_EN0_ID << ENA_SHIFT),
2546 kINPUTMUX_Ctimer0M0ToDmac0Ch6RequestEna = 6U + (DMA0_REQ_EN0_ID << ENA_SHIFT),
2547 kINPUTMUX_Ctimer0M1ToDmac0Ch7RequestEna = 7U + (DMA0_REQ_EN0_ID << ENA_SHIFT),
2548 kINPUTMUX_Ctimer1M0ToDmac0Ch8RequestEna = 8U + (DMA0_REQ_EN0_ID << ENA_SHIFT),
[all …]

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