/hal_nxp-3.5.0/s32/drivers/s32ze/Uart/include/ |
D | Linflexd_Uart_Ip_HwAccess.h | 710 static inline void Linflexd_Uart_Ip_SetTxDataBuffer1Byte(LINFLEXD_Type * Base, uint8 Data) in Linflexd_Uart_Ip_SetTxDataBuffer1Byte() argument 712 Base->BDRL = LINFLEXD_BDRL_DATA0(Data); in Linflexd_Uart_Ip_SetTxDataBuffer1Byte() 724 static inline void Linflexd_Uart_Ip_SetTxDataBuffer2Bytes(LINFLEXD_Type * Base, uint16 Data) in Linflexd_Uart_Ip_SetTxDataBuffer2Bytes() argument 729 DataTemp = SWAP_BYTES_UINT16(Data); in Linflexd_Uart_Ip_SetTxDataBuffer2Bytes() 731 DataTemp = Data; in Linflexd_Uart_Ip_SetTxDataBuffer2Bytes() 761 uint16 Data; in Linflexd_Uart_Ip_GetRxDataBuffer2Bytes() local 763 Data = (uint16)(Base->BDRM & Mask); in Linflexd_Uart_Ip_GetRxDataBuffer2Bytes() 765 Data = SWAP_BYTES_UINT16(Data); in Linflexd_Uart_Ip_GetRxDataBuffer2Bytes() 767 return Data; in Linflexd_Uart_Ip_GetRxDataBuffer2Bytes()
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/hal_nxp-3.5.0/s32/drivers/s32k3/Fls/include/ |
D | Qspi_Ip_Controller.h | 103 #define Qspi_Ip_WriteLuts(Instance, StartLutRegister, Data, Size) \ argument 104 … OsIf_Trusted_Call4params(Qspi_Ip_WriteLuts_Privileged, Instance, StartLutRegister, Data, Size) 110 #define Qspi_Ip_WriteLuts(Instance, StartLutRegister, Data, Size) \ 111 Qspi_Ip_WriteLuts_Privileged(Instance, StartLutRegister, Data, Size) 189 const uint32 *Data,
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D | Qspi_Ip_TrustedFunctions.h | 86 const uint32 *Data,
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/hal_nxp-3.5.0/s32/drivers/s32ze/Eth_NETC/src/ |
D | Netc_Eth_Ip_Irq.c | 232 …NETC__ENETC0_BASE->NUM_SI[CounterRxMsgFromVsi].PSIPMAR0 = CmdMacReceivedAddr->Data[2U] | \ in Netc_Eth_Ip_MSIX_SIMsgEvent() 233 … (CmdMacReceivedAddr->Data[3U] << 8U ) | \ in Netc_Eth_Ip_MSIX_SIMsgEvent() 234 … (CmdMacReceivedAddr->Data[4U] << 16U) | \ in Netc_Eth_Ip_MSIX_SIMsgEvent() 235 … (CmdMacReceivedAddr->Data[5U] << 24U); in Netc_Eth_Ip_MSIX_SIMsgEvent() 236 …NETC__ENETC0_BASE->NUM_SI[CounterRxMsgFromVsi].PSIPMAR1 = CmdMacReceivedAddr->Data[6U] | \ in Netc_Eth_Ip_MSIX_SIMsgEvent() 237 … (CmdMacReceivedAddr->Data[7U] << 8U); in Netc_Eth_Ip_MSIX_SIMsgEvent() 242 HashValue = CmdMacReceivedAddr->Data[0U]; in Netc_Eth_Ip_MSIX_SIMsgEvent() 255 HashValue = CmdMacReceivedAddr->Data[0U]; in Netc_Eth_Ip_MSIX_SIMsgEvent()
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D | Netc_Eth_Ip.c | 586 MsgCommandConfig->Data[0U] = (uint8)0U; in Netc_Eth_Ip_SendMsgFromVsiToPsi() 587 MsgCommandConfig->Data[1U] = (uint8)0U; in Netc_Eth_Ip_SendMsgFromVsiToPsi() 588 MsgCommandConfig->Data[2U] = MacAddr[0U]; in Netc_Eth_Ip_SendMsgFromVsiToPsi() 589 MsgCommandConfig->Data[3U] = MacAddr[1U]; in Netc_Eth_Ip_SendMsgFromVsiToPsi() 590 MsgCommandConfig->Data[4U] = MacAddr[2U]; in Netc_Eth_Ip_SendMsgFromVsiToPsi() 591 MsgCommandConfig->Data[5U] = MacAddr[3U]; in Netc_Eth_Ip_SendMsgFromVsiToPsi() 592 MsgCommandConfig->Data[6U] = MacAddr[4U]; in Netc_Eth_Ip_SendMsgFromVsiToPsi() 593 MsgCommandConfig->Data[7U] = MacAddr[5U]; in Netc_Eth_Ip_SendMsgFromVsiToPsi() 820 MsgCommandConfig->Data[0U] = (uint8)0U; in Netc_Eth_Ip_VsiToPsiMsg() 821 MsgCommandConfig->Data[1U] = (uint8)0U; in Netc_Eth_Ip_VsiToPsiMsg() [all …]
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/hal_nxp-3.5.0/s32/drivers/s32k3/Eth_GMAC/src/ |
D | Gmac_Ip.c | 291 uint32 Data, 549 uint32 Data, in Gmac_Ip_WriteGateControlList() argument 561 Gmac_apxBases[Instance]->MTL_EST_GCL_DATA = GMAC_MTL_EST_GCL_DATA_GCD(Data); in Gmac_Ip_WriteGateControlList() 1426 Buff->Data = (uint8 *)Bd->Des0; in Gmac_Ip_GetTxBuff() 1531 GMAC_DEV_ASSERT(Buff->Data != NULL_PTR); in Gmac_Ip_SendFrame() 1545 Bd->Des0 = (uint32)Buff->Data; in Gmac_Ip_SendFrame() 1547 Bd->Info0 = (uint32)Buff->Data; in Gmac_Ip_SendFrame() 1571 …CacheStatus = Cache_Ip_CleanByAddr(CacheType, CACHE_IP_DATA, TRUE,(uint32) Buff->Data, Buff->Lengt… in Gmac_Ip_SendFrame() 1631 GMAC_DEV_ASSERT(Buffers[i].Data != NULL_PTR); in Gmac_Ip_SendMultiBufferFrame() 1641 Bd->Des0 = (uint32)Buffers[i].Data; in Gmac_Ip_SendMultiBufferFrame() [all …]
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/hal_nxp-3.5.0/s32/drivers/s32k3/Eth_GMAC/include/ |
D | Gmac_Ip.h | 417 uint16 *Data, 434 uint16 Data, 453 uint16 *Data, 472 uint16 Data,
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/hal_nxp-3.5.0/s32/drivers/s32ze/Spi/src/ |
D | Spi_Ip.c | 982 uint32 Data; in Spi_Ip_ReadRxFifo() local 986 Data = Base->POPR; in Spi_Ip_ReadRxFifo() 991 *((uint8*)(&State->RxBuffer[State->RxIndex])) = (uint8)Data; in Spi_Ip_ReadRxFifo() 995 *((uint16*)(&State->RxBuffer[2u * State->RxIndex])) = (uint16)Data; in Spi_Ip_ReadRxFifo() 999 *((uint32*)(&State->RxBuffer[4u * State->RxIndex])) = Data; in Spi_Ip_ReadRxFifo() 1023 uint16 Data = 0u; in Spi_Ip_WriteTxFifo() local 1031 Data = *((const uint8*)(&State->TxBuffer[State->TxIndex])); in Spi_Ip_WriteTxFifo() 1035 Data = *((const uint16*)(&State->TxBuffer[2u * State->TxIndex])); in Spi_Ip_WriteTxFifo() 1044 … Data = (uint16)State->ExternalDevice->DeviceParams->DefaultData; /* get 2 bytes */ in Spi_Ip_WriteTxFifo() 1048 … Data = (uint16)(State->ExternalDevice->DeviceParams->DefaultData >> 16u); /* get 2 bytes */ in Spi_Ip_WriteTxFifo() [all …]
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/hal_nxp-3.5.0/mcux/mcux-sdk/boards/evkmimxrt1024/cmsis_pack_flash_algo/ |
D | Target.lin | 10 PrgData +0 ; Data
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/hal_nxp-3.5.0/mcux/mcux-sdk/middleware/issdk/docs/issdk/ISSDK API Reference Manual/ |
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/hal_nxp-3.5.0/mcux/scripts/pinctrl/ |
D | README.md | 36 ## Data Packs 37 Data packs for processors can be downloaded from
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/hal_nxp-3.5.0/s32/drivers/s32ze/Uart/src/ |
D | Linflexd_Uart_Ip.c | 561 uint8 Data = *(UartState->TxBuff); in Linflexd_Uart_Ip_PutData() local 566 Linflexd_Uart_Ip_SetTxDataBuffer1Byte(Base, Data); in Linflexd_Uart_Ip_PutData() 573 uint16 Data = (uint16)(*UartState->TxBuff); in Linflexd_Uart_Ip_PutData() local 576 Linflexd_Uart_Ip_SetTxDataBuffer2Bytes(Base, Data); in Linflexd_Uart_Ip_PutData() 580 uint16 Data = *((const uint16*)UartState->TxBuff); in Linflexd_Uart_Ip_PutData() local 585 Linflexd_Uart_Ip_SetTxDataBuffer2Bytes(Base, Data); in Linflexd_Uart_Ip_PutData()
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