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Searched refs:DPU_ROP_CONTROL_SecDiv2_MASK (Results 1 – 1 of 1) sorted by relevance

/hal_nxp-3.5.0/mcux/mcux-sdk/drivers/dpu/
Dfsl_dpu.h211 #define DPU_ROP_CONTROL_SecDiv2_MASK (1U << 9U) macro
665 …kDPU_RopSecDiv2 = DPU_ROP_CONTROL_SecDiv2_MASK, /*!< In add mode, set this to divide secondary p…