Searched refs:DPLLClkSource (Results 1 – 2 of 2) sorted by relevance
114 base->SRPC = SPDIF_SRPC_CLKSRC_SEL(config->DPLLClkSource) | SPDIF_SRPC_GAINSEL(config->gain); in SPDIF_Init()163 config->DPLLClkSource = 1; in SPDIF_GetDefaultConfig()
145 …uint8_t DPLLClkSource; /*!< SPDIF DPLL clock source, range from 0~15, meaning is … member