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Searched refs:DMA_CH0_STATUS (Results 1 – 2 of 2) sorted by relevance

/hal_nxp-3.5.0/s32/drivers/s32k3/Eth_GMAC/src/
DGmac_Ip_Irq.c189 if ((IP_GMAC_0->DMA_CH0_STATUS & GMAC_DMA_CH0_STATUS_TI_MASK) != 0U) in ISR()
224 if ((IP_GMAC_0->DMA_CH0_STATUS & GMAC_DMA_CH0_STATUS_RI_MASK) != 0U) in ISR()
331 if ((IP_GMAC_1->DMA_CH0_STATUS & GMAC_DMA_CH0_STATUS_TI_MASK) != 0U) in ISR()
365 if ((IP_GMAC_1->DMA_CH0_STATUS & GMAC_DMA_CH0_STATUS_RI_MASK) != 0U) in ISR()
/hal_nxp-3.5.0/s32/drivers/s32k3/BaseNXP/header/
DS32K344_EMAC.h398 __IO uint32_t DMA_CH0_STATUS; /**< DMA Channel 0 Status, offset: 0x1160 */ member