Searched refs:DMAR (Results 1 – 2 of 2) sorted by relevance
| /hal_nxp-3.5.0/s32/drivers/s32k3/Adc/include/ |
| D | Adc_Sar_Ip_HeaderWrapper_S32K3.h | 171 #define DMAR(base, regIndex) REG_ACCESS((base)->DMAR0, (regIndex)) macro
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| /hal_nxp-3.5.0/s32/drivers/s32k3/Adc/src/ |
| D | Adc_Sar_Ip.c | 1075 DMAR(AdcAEBasePtr, Index) = DmarMask[Index]; in Adc_Sar_ConfigChannels()
1086 DMAR(AdcBasePtr, Index) = DmarMask[Index]; in Adc_Sar_ConfigChannels()
2296 DMAR(AdcAEBasePtr, Index) = 0u; in Adc_Sar_Ip_Deinit()
2314 DMAR(AdcBasePtr, Index) = 0u; in Adc_Sar_Ip_Deinit()
4504 DMAR(AdcAEBasePtr, VectAdr) |= 1UL << VectBit; in Adc_Sar_Ip_EnableChannelDma()
4512 DMAR(AdcBasePtr, VectAdr) |= 1UL << VectBit; in Adc_Sar_Ip_EnableChannelDma()
4551 DMAR(AdcAEBasePtr, VectAdr) &= ~(1UL << VectBit); in Adc_Sar_Ip_DisableChannelDma()
4559 DMAR(AdcBasePtr, VectAdr) &= ~(1UL << VectBit); in Adc_Sar_Ip_DisableChannelDma()
4591 DMAR(AdcAEBasePtr, Index) &= ~(Adc_Sar_Ip_au32AdcChanBitmap[u32Instance][Index]); in Adc_Sar_Ip_DisableChannelDmaAll()
4602 DMAR(AdcBasePtr, Index) &= ~(Adc_Sar_Ip_au32AdcChanBitmap[u32Instance][Index]); in Adc_Sar_Ip_DisableChannelDmaAll()
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