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Searched refs:DMA1_TRIG13_PIO0_5 (Results 1 – 18 of 18) sorted by relevance

/hal_nxp-3.5.0/dts/nxp/lpc/
DLPC55S06JHI48-pinctrl.h253 #define DMA1_TRIG13_PIO0_5 IOCON_MUX(5, IOCON_TYPE_D, 0) /* PIO0_5 */ macro
DLPC55S16JBD64-pinctrl.h382 #define DMA1_TRIG13_PIO0_5 IOCON_MUX(5, IOCON_TYPE_D, 0) /* PIO0_5 */ macro
DLPC55S28JBD64-pinctrl.h382 #define DMA1_TRIG13_PIO0_5 IOCON_MUX(5, IOCON_TYPE_D, 0) /* PIO0_5 */ macro
DLPC55S69JBD64-pinctrl.h382 #define DMA1_TRIG13_PIO0_5 IOCON_MUX(5, IOCON_TYPE_D, 0) /* PIO0_5 */ macro
DLPC55S06JBD64-pinctrl.h382 #define DMA1_TRIG13_PIO0_5 IOCON_MUX(5, IOCON_TYPE_D, 0) /* PIO0_5 */ macro
DLPC55S16JBD100-pinctrl.h382 #define DMA1_TRIG13_PIO0_5 IOCON_MUX(5, IOCON_TYPE_D, 0) /* PIO0_5 */ macro
DLPC55S28JBD100-pinctrl.h382 #define DMA1_TRIG13_PIO0_5 IOCON_MUX(5, IOCON_TYPE_D, 0) /* PIO0_5 */ macro
DLPC55S28JEV98-pinctrl.h382 #define DMA1_TRIG13_PIO0_5 IOCON_MUX(5, IOCON_TYPE_D, 0) /* PIO0_5 */ macro
DLPC55S69JBD100-pinctrl.h382 #define DMA1_TRIG13_PIO0_5 IOCON_MUX(5, IOCON_TYPE_D, 0) /* PIO0_5 */ macro
DLPC55S36JHI48-pinctrl.h746 #define DMA1_TRIG13_PIO0_5 IOCON_MUX(5, IOCON_TYPE_D, 0) /* PIO0_5 */ macro
DLPC55S69JEV98-pinctrl.h382 #define DMA1_TRIG13_PIO0_5 IOCON_MUX(5, IOCON_TYPE_D, 0) /* PIO0_5 */ macro
DLPC55S16JEV98-pinctrl.h382 #define DMA1_TRIG13_PIO0_5 IOCON_MUX(5, IOCON_TYPE_D, 0) /* PIO0_5 */ macro
DLPC55S36JBD100-pinctrl.h746 #define DMA1_TRIG13_PIO0_5 IOCON_MUX(5, IOCON_TYPE_D, 0) /* PIO0_5 */ macro
/hal_nxp-3.5.0/dts/nxp/nxp_imx/rt/
DMIMXRT685SFAWBR-pinctrl.h490 #define DMA1_TRIG13_PIO0_5 IOPCTL_MUX(5, 0) /* PIO0_5 */ macro
DMIMXRT595SFAWC-pinctrl.h574 #define DMA1_TRIG13_PIO0_5 IOPCTL_MUX(5, 0) /* PIO0_5 */ macro
DMIMXRT595SFFOC-pinctrl.h576 #define DMA1_TRIG13_PIO0_5 IOPCTL_MUX(5, 0) /* PIO0_5 */ macro
DMIMXRT685SFFOB-pinctrl.h492 #define DMA1_TRIG13_PIO0_5 IOPCTL_MUX(5, 0) /* PIO0_5 */ macro
DMIMXRT685SFVKB-pinctrl.h492 #define DMA1_TRIG13_PIO0_5 IOPCTL_MUX(5, 0) /* PIO0_5 */ macro