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Searched refs:DMA1_ITRIG_ENA_ID (Results 1 – 19 of 19) sorted by relevance

/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC55S06/drivers/
Dfsl_inputmux_connections.h49 #define DMA1_ITRIG_ENA_ID 0x7A0U macro
448 kINPUTMUX_Dmac1InputTriggerPint0Ena = 0U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
449 kINPUTMUX_Dmac1InputTriggerPint1Ena = 1U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
450 kINPUTMUX_Dmac1InputTriggerPint2Ena = 2U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
451 kINPUTMUX_Dmac1InputTriggerPint3Ena = 3U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
452 kINPUTMUX_Dmac1InputTriggerCtimer0M0Ena = 4U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
453 kINPUTMUX_Dmac1InputTriggerCtimer0M1Ena = 5U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
454 kINPUTMUX_Dmac1InputTriggerCtimer2M0Ena = 6U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
455 kINPUTMUX_Dmac1InputTriggerCtimer4M0Ena = 7U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
456 kINPUTMUX_Dmac1InputTriggerDma1Out0Ena = 8U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5506/drivers/
Dfsl_inputmux_connections.h49 #define DMA1_ITRIG_ENA_ID 0x7A0U macro
448 kINPUTMUX_Dmac1InputTriggerPint0Ena = 0U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
449 kINPUTMUX_Dmac1InputTriggerPint1Ena = 1U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
450 kINPUTMUX_Dmac1InputTriggerPint2Ena = 2U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
451 kINPUTMUX_Dmac1InputTriggerPint3Ena = 3U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
452 kINPUTMUX_Dmac1InputTriggerCtimer0M0Ena = 4U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
453 kINPUTMUX_Dmac1InputTriggerCtimer0M1Ena = 5U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
454 kINPUTMUX_Dmac1InputTriggerCtimer2M0Ena = 6U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
455 kINPUTMUX_Dmac1InputTriggerCtimer4M0Ena = 7U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
456 kINPUTMUX_Dmac1InputTriggerDma1Out0Ena = 8U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC55S04/drivers/
Dfsl_inputmux_connections.h49 #define DMA1_ITRIG_ENA_ID 0x7A0U macro
448 kINPUTMUX_Dmac1InputTriggerPint0Ena = 0U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
449 kINPUTMUX_Dmac1InputTriggerPint1Ena = 1U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
450 kINPUTMUX_Dmac1InputTriggerPint2Ena = 2U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
451 kINPUTMUX_Dmac1InputTriggerPint3Ena = 3U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
452 kINPUTMUX_Dmac1InputTriggerCtimer0M0Ena = 4U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
453 kINPUTMUX_Dmac1InputTriggerCtimer0M1Ena = 5U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
454 kINPUTMUX_Dmac1InputTriggerCtimer2M0Ena = 6U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
455 kINPUTMUX_Dmac1InputTriggerCtimer4M0Ena = 7U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
456 kINPUTMUX_Dmac1InputTriggerDma1Out0Ena = 8U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5502CPXXXX/drivers/
Dfsl_inputmux_connections.h49 #define DMA1_ITRIG_ENA_ID 0x7A0U macro
448 kINPUTMUX_Dmac1InputTriggerPint0Ena = 0U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
449 kINPUTMUX_Dmac1InputTriggerPint1Ena = 1U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
450 kINPUTMUX_Dmac1InputTriggerPint2Ena = 2U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
451 kINPUTMUX_Dmac1InputTriggerPint3Ena = 3U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
452 kINPUTMUX_Dmac1InputTriggerCtimer0M0Ena = 4U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
453 kINPUTMUX_Dmac1InputTriggerCtimer0M1Ena = 5U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
454 kINPUTMUX_Dmac1InputTriggerCtimer2M0Ena = 6U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
455 kINPUTMUX_Dmac1InputTriggerCtimer4M0Ena = 7U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
456 kINPUTMUX_Dmac1InputTriggerDma1Out0Ena = 8U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5504CPXXXX/drivers/
Dfsl_inputmux_connections.h49 #define DMA1_ITRIG_ENA_ID 0x7A0U macro
448 kINPUTMUX_Dmac1InputTriggerPint0Ena = 0U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
449 kINPUTMUX_Dmac1InputTriggerPint1Ena = 1U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
450 kINPUTMUX_Dmac1InputTriggerPint2Ena = 2U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
451 kINPUTMUX_Dmac1InputTriggerPint3Ena = 3U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
452 kINPUTMUX_Dmac1InputTriggerCtimer0M0Ena = 4U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
453 kINPUTMUX_Dmac1InputTriggerCtimer0M1Ena = 5U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
454 kINPUTMUX_Dmac1InputTriggerCtimer2M0Ena = 6U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
455 kINPUTMUX_Dmac1InputTriggerCtimer4M0Ena = 7U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
456 kINPUTMUX_Dmac1InputTriggerDma1Out0Ena = 8U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5504/drivers/
Dfsl_inputmux_connections.h49 #define DMA1_ITRIG_ENA_ID 0x7A0U macro
448 kINPUTMUX_Dmac1InputTriggerPint0Ena = 0U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
449 kINPUTMUX_Dmac1InputTriggerPint1Ena = 1U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
450 kINPUTMUX_Dmac1InputTriggerPint2Ena = 2U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
451 kINPUTMUX_Dmac1InputTriggerPint3Ena = 3U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
452 kINPUTMUX_Dmac1InputTriggerCtimer0M0Ena = 4U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
453 kINPUTMUX_Dmac1InputTriggerCtimer0M1Ena = 5U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
454 kINPUTMUX_Dmac1InputTriggerCtimer2M0Ena = 6U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
455 kINPUTMUX_Dmac1InputTriggerCtimer4M0Ena = 7U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
456 kINPUTMUX_Dmac1InputTriggerDma1Out0Ena = 8U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5506CPXXXX/drivers/
Dfsl_inputmux_connections.h49 #define DMA1_ITRIG_ENA_ID 0x7A0U macro
448 kINPUTMUX_Dmac1InputTriggerPint0Ena = 0U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
449 kINPUTMUX_Dmac1InputTriggerPint1Ena = 1U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
450 kINPUTMUX_Dmac1InputTriggerPint2Ena = 2U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
451 kINPUTMUX_Dmac1InputTriggerPint3Ena = 3U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
452 kINPUTMUX_Dmac1InputTriggerCtimer0M0Ena = 4U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
453 kINPUTMUX_Dmac1InputTriggerCtimer0M1Ena = 5U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
454 kINPUTMUX_Dmac1InputTriggerCtimer2M0Ena = 6U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
455 kINPUTMUX_Dmac1InputTriggerCtimer4M0Ena = 7U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
456 kINPUTMUX_Dmac1InputTriggerDma1Out0Ena = 8U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5502/drivers/
Dfsl_inputmux_connections.h49 #define DMA1_ITRIG_ENA_ID 0x7A0U macro
448 kINPUTMUX_Dmac1InputTriggerPint0Ena = 0U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
449 kINPUTMUX_Dmac1InputTriggerPint1Ena = 1U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
450 kINPUTMUX_Dmac1InputTriggerPint2Ena = 2U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
451 kINPUTMUX_Dmac1InputTriggerPint3Ena = 3U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
452 kINPUTMUX_Dmac1InputTriggerCtimer0M0Ena = 4U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
453 kINPUTMUX_Dmac1InputTriggerCtimer0M1Ena = 5U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
454 kINPUTMUX_Dmac1InputTriggerCtimer2M0Ena = 6U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
455 kINPUTMUX_Dmac1InputTriggerCtimer4M0Ena = 7U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
456 kINPUTMUX_Dmac1InputTriggerDma1Out0Ena = 8U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5526/drivers/
Dfsl_inputmux_connections.h49 #define DMA1_ITRIG_ENA_ID 0x7A0U macro
475 kINPUTMUX_Dmac1InputTriggerPint0Ena = 0U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
476 kINPUTMUX_Dmac1InputTriggerPint1Ena = 1U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
477 kINPUTMUX_Dmac1InputTriggerPint2Ena = 2U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
478 kINPUTMUX_Dmac1InputTriggerPint3Ena = 3U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
479 kINPUTMUX_Dmac1InputTriggerCtimer0M0Ena = 4U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
480 kINPUTMUX_Dmac1InputTriggerCtimer0M1Ena = 5U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
481 kINPUTMUX_Dmac1InputTriggerCtimer2M0Ena = 6U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
482 kINPUTMUX_Dmac1InputTriggerCtimer4M0Ena = 7U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
483 kINPUTMUX_Dmac1InputTriggerDma1Out0Ena = 8U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5512/drivers/
Dfsl_inputmux_connections.h49 #define DMA1_ITRIG_ENA_ID 0x7A0U macro
460 kINPUTMUX_Dmac1InputTriggerPint0Ena = 0U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
461 kINPUTMUX_Dmac1InputTriggerPint1Ena = 1U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
462 kINPUTMUX_Dmac1InputTriggerPint2Ena = 2U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
463 kINPUTMUX_Dmac1InputTriggerPint3Ena = 3U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
464 kINPUTMUX_Dmac1InputTriggerCtimer0M0Ena = 4U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
465 kINPUTMUX_Dmac1InputTriggerCtimer0M1Ena = 5U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
466 kINPUTMUX_Dmac1InputTriggerCtimer2M0Ena = 6U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
467 kINPUTMUX_Dmac1InputTriggerCtimer4M0Ena = 7U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
468 kINPUTMUX_Dmac1InputTriggerDma1Out0Ena = 8U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5528/drivers/
Dfsl_inputmux_connections.h49 #define DMA1_ITRIG_ENA_ID 0x7A0U macro
475 kINPUTMUX_Dmac1InputTriggerPint0Ena = 0U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
476 kINPUTMUX_Dmac1InputTriggerPint1Ena = 1U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
477 kINPUTMUX_Dmac1InputTriggerPint2Ena = 2U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
478 kINPUTMUX_Dmac1InputTriggerPint3Ena = 3U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
479 kINPUTMUX_Dmac1InputTriggerCtimer0M0Ena = 4U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
480 kINPUTMUX_Dmac1InputTriggerCtimer0M1Ena = 5U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
481 kINPUTMUX_Dmac1InputTriggerCtimer2M0Ena = 6U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
482 kINPUTMUX_Dmac1InputTriggerCtimer4M0Ena = 7U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
483 kINPUTMUX_Dmac1InputTriggerDma1Out0Ena = 8U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC55S69/drivers/
Dfsl_inputmux_connections.h49 #define DMA1_ITRIG_ENA_ID 0x7A0U macro
475 kINPUTMUX_Dmac1InputTriggerPint0Ena = 0U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
476 kINPUTMUX_Dmac1InputTriggerPint1Ena = 1U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
477 kINPUTMUX_Dmac1InputTriggerPint2Ena = 2U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
478 kINPUTMUX_Dmac1InputTriggerPint3Ena = 3U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
479 kINPUTMUX_Dmac1InputTriggerCtimer0M0Ena = 4U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
480 kINPUTMUX_Dmac1InputTriggerCtimer0M1Ena = 5U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
481 kINPUTMUX_Dmac1InputTriggerCtimer2M0Ena = 6U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
482 kINPUTMUX_Dmac1InputTriggerCtimer4M0Ena = 7U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
483 kINPUTMUX_Dmac1InputTriggerDma1Out0Ena = 8U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC55S26/drivers/
Dfsl_inputmux_connections.h49 #define DMA1_ITRIG_ENA_ID 0x7A0U macro
475 kINPUTMUX_Dmac1InputTriggerPint0Ena = 0U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
476 kINPUTMUX_Dmac1InputTriggerPint1Ena = 1U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
477 kINPUTMUX_Dmac1InputTriggerPint2Ena = 2U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
478 kINPUTMUX_Dmac1InputTriggerPint3Ena = 3U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
479 kINPUTMUX_Dmac1InputTriggerCtimer0M0Ena = 4U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
480 kINPUTMUX_Dmac1InputTriggerCtimer0M1Ena = 5U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
481 kINPUTMUX_Dmac1InputTriggerCtimer2M0Ena = 6U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
482 kINPUTMUX_Dmac1InputTriggerCtimer4M0Ena = 7U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
483 kINPUTMUX_Dmac1InputTriggerDma1Out0Ena = 8U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC55S28/drivers/
Dfsl_inputmux_connections.h49 #define DMA1_ITRIG_ENA_ID 0x7A0U macro
475 kINPUTMUX_Dmac1InputTriggerPint0Ena = 0U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
476 kINPUTMUX_Dmac1InputTriggerPint1Ena = 1U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
477 kINPUTMUX_Dmac1InputTriggerPint2Ena = 2U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
478 kINPUTMUX_Dmac1InputTriggerPint3Ena = 3U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
479 kINPUTMUX_Dmac1InputTriggerCtimer0M0Ena = 4U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
480 kINPUTMUX_Dmac1InputTriggerCtimer0M1Ena = 5U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
481 kINPUTMUX_Dmac1InputTriggerCtimer2M0Ena = 6U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
482 kINPUTMUX_Dmac1InputTriggerCtimer4M0Ena = 7U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
483 kINPUTMUX_Dmac1InputTriggerDma1Out0Ena = 8U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC55S16/drivers/
Dfsl_inputmux_connections.h49 #define DMA1_ITRIG_ENA_ID 0x7A0U macro
460 kINPUTMUX_Dmac1InputTriggerPint0Ena = 0U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
461 kINPUTMUX_Dmac1InputTriggerPint1Ena = 1U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
462 kINPUTMUX_Dmac1InputTriggerPint2Ena = 2U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
463 kINPUTMUX_Dmac1InputTriggerPint3Ena = 3U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
464 kINPUTMUX_Dmac1InputTriggerCtimer0M0Ena = 4U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
465 kINPUTMUX_Dmac1InputTriggerCtimer0M1Ena = 5U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
466 kINPUTMUX_Dmac1InputTriggerCtimer2M0Ena = 6U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
467 kINPUTMUX_Dmac1InputTriggerCtimer4M0Ena = 7U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
468 kINPUTMUX_Dmac1InputTriggerDma1Out0Ena = 8U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC55S14/drivers/
Dfsl_inputmux_connections.h49 #define DMA1_ITRIG_ENA_ID 0x7A0U macro
460 kINPUTMUX_Dmac1InputTriggerPint0Ena = 0U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
461 kINPUTMUX_Dmac1InputTriggerPint1Ena = 1U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
462 kINPUTMUX_Dmac1InputTriggerPint2Ena = 2U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
463 kINPUTMUX_Dmac1InputTriggerPint3Ena = 3U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
464 kINPUTMUX_Dmac1InputTriggerCtimer0M0Ena = 4U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
465 kINPUTMUX_Dmac1InputTriggerCtimer0M1Ena = 5U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
466 kINPUTMUX_Dmac1InputTriggerCtimer2M0Ena = 6U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
467 kINPUTMUX_Dmac1InputTriggerCtimer4M0Ena = 7U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
468 kINPUTMUX_Dmac1InputTriggerDma1Out0Ena = 8U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC55S66/drivers/
Dfsl_inputmux_connections.h49 #define DMA1_ITRIG_ENA_ID 0x7A0U macro
475 kINPUTMUX_Dmac1InputTriggerPint0Ena = 0U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
476 kINPUTMUX_Dmac1InputTriggerPint1Ena = 1U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
477 kINPUTMUX_Dmac1InputTriggerPint2Ena = 2U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
478 kINPUTMUX_Dmac1InputTriggerPint3Ena = 3U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
479 kINPUTMUX_Dmac1InputTriggerCtimer0M0Ena = 4U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
480 kINPUTMUX_Dmac1InputTriggerCtimer0M1Ena = 5U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
481 kINPUTMUX_Dmac1InputTriggerCtimer2M0Ena = 6U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
482 kINPUTMUX_Dmac1InputTriggerCtimer4M0Ena = 7U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
483 kINPUTMUX_Dmac1InputTriggerDma1Out0Ena = 8U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5514/drivers/
Dfsl_inputmux_connections.h49 #define DMA1_ITRIG_ENA_ID 0x7A0U macro
460 kINPUTMUX_Dmac1InputTriggerPint0Ena = 0U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
461 kINPUTMUX_Dmac1InputTriggerPint1Ena = 1U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
462 kINPUTMUX_Dmac1InputTriggerPint2Ena = 2U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
463 kINPUTMUX_Dmac1InputTriggerPint3Ena = 3U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
464 kINPUTMUX_Dmac1InputTriggerCtimer0M0Ena = 4U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
465 kINPUTMUX_Dmac1InputTriggerCtimer0M1Ena = 5U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
466 kINPUTMUX_Dmac1InputTriggerCtimer2M0Ena = 6U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
467 kINPUTMUX_Dmac1InputTriggerCtimer4M0Ena = 7U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
468 kINPUTMUX_Dmac1InputTriggerDma1Out0Ena = 8U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
[all …]
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5516/drivers/
Dfsl_inputmux_connections.h49 #define DMA1_ITRIG_ENA_ID 0x7A0U macro
460 kINPUTMUX_Dmac1InputTriggerPint0Ena = 0U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
461 kINPUTMUX_Dmac1InputTriggerPint1Ena = 1U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
462 kINPUTMUX_Dmac1InputTriggerPint2Ena = 2U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
463 kINPUTMUX_Dmac1InputTriggerPint3Ena = 3U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
464 kINPUTMUX_Dmac1InputTriggerCtimer0M0Ena = 4U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
465 kINPUTMUX_Dmac1InputTriggerCtimer0M1Ena = 5U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
466 kINPUTMUX_Dmac1InputTriggerCtimer2M0Ena = 6U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
467 kINPUTMUX_Dmac1InputTriggerCtimer4M0Ena = 7U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
468 kINPUTMUX_Dmac1InputTriggerDma1Out0Ena = 8U + (DMA1_ITRIG_ENA_ID << ENA_SHIFT),
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