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Searched refs:DMA0_TRIG1_PIO0_2 (Results 1 – 7 of 7) sorted by relevance

/hal_nxp-3.5.0/dts/nxp/lpc/
DLPC51U68JBD64-pinctrl.h95 #define DMA0_TRIG1_PIO0_2 IOCON_MUX(2, IOCON_TYPE_D, 0) /* PIO0_2 */ macro
DLPC54114J256BD64-pinctrl.h105 #define DMA0_TRIG1_PIO0_2 IOCON_MUX(2, IOCON_TYPE_D, 0) /* PIO0_2 */ macro
/hal_nxp-3.5.0/dts/nxp/nxp_imx/rt/
DMIMXRT685SFAWBR-pinctrl.h187 #define DMA0_TRIG1_PIO0_2 IOPCTL_MUX(2, 0) /* PIO0_2 */ macro
DMIMXRT595SFAWC-pinctrl.h219 #define DMA0_TRIG1_PIO0_2 IOPCTL_MUX(2, 0) /* PIO0_2 */ macro
DMIMXRT595SFFOC-pinctrl.h221 #define DMA0_TRIG1_PIO0_2 IOPCTL_MUX(2, 0) /* PIO0_2 */ macro
DMIMXRT685SFFOB-pinctrl.h189 #define DMA0_TRIG1_PIO0_2 IOPCTL_MUX(2, 0) /* PIO0_2 */ macro
DMIMXRT685SFVKB-pinctrl.h189 #define DMA0_TRIG1_PIO0_2 IOPCTL_MUX(2, 0) /* PIO0_2 */ macro