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Searched refs:DMA0_TRIG15_PIO1_9 (Results 1 – 6 of 6) sorted by relevance

/hal_nxp-3.5.0/dts/nxp/lpc/
DLPC51U68JBD64-pinctrl.h1222 #define DMA0_TRIG15_PIO1_9 IOCON_MUX(41, IOCON_TYPE_D, 0) /* PIO1_9 */ macro
DLPC54114J256BD64-pinctrl.h1392 #define DMA0_TRIG15_PIO1_9 IOCON_MUX(41, IOCON_TYPE_D, 0) /* PIO1_9 */ macro
/hal_nxp-3.5.0/dts/nxp/nxp_imx/rt/
DMIMXRT685SFAWBR-pinctrl.h2945 #define DMA0_TRIG15_PIO1_9 IOPCTL_MUX(41, 0) /* PIO1_9 */ macro
DMIMXRT595SFAWC-pinctrl.h3577 #define DMA0_TRIG15_PIO1_9 IOPCTL_MUX(41, 0) /* PIO1_9 */ macro
DMIMXRT685SFFOB-pinctrl.h3686 #define DMA0_TRIG15_PIO1_9 IOPCTL_MUX(41, 0) /* PIO1_9 */ macro
DMIMXRT685SFVKB-pinctrl.h3686 #define DMA0_TRIG15_PIO1_9 IOPCTL_MUX(41, 0) /* PIO1_9 */ macro