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Searched refs:DMA0_TRIG011_PIO1_5 (Results 1 – 9 of 9) sorted by relevance

/hal_nxp-3.5.0/dts/nxp/lpc/
DLPC55S06JHI48-pinctrl.h1755 #define DMA0_TRIG011_PIO1_5 IOCON_MUX(37, IOCON_TYPE_D, 0) /* PIO1_5 */ macro
DLPC55S06JBD64-pinctrl.h2226 #define DMA0_TRIG011_PIO1_5 IOCON_MUX(37, IOCON_TYPE_D, 0) /* PIO1_5 */ macro
DLPC55S16JBD100-pinctrl.h2287 #define DMA0_TRIG011_PIO1_5 IOCON_MUX(37, IOCON_TYPE_D, 0) /* PIO1_5 */ macro
DLPC55S28JBD100-pinctrl.h2303 #define DMA0_TRIG011_PIO1_5 IOCON_MUX(37, IOCON_TYPE_D, 0) /* PIO1_5 */ macro
DLPC55S28JEV98-pinctrl.h2303 #define DMA0_TRIG011_PIO1_5 IOCON_MUX(37, IOCON_TYPE_D, 0) /* PIO1_5 */ macro
DLPC55S69JBD100-pinctrl.h2303 #define DMA0_TRIG011_PIO1_5 IOCON_MUX(37, IOCON_TYPE_D, 0) /* PIO1_5 */ macro
DLPC55S69JEV98-pinctrl.h2303 #define DMA0_TRIG011_PIO1_5 IOCON_MUX(37, IOCON_TYPE_D, 0) /* PIO1_5 */ macro
DLPC55S16JEV98-pinctrl.h2287 #define DMA0_TRIG011_PIO1_5 IOCON_MUX(37, IOCON_TYPE_D, 0) /* PIO1_5 */ macro
DLPC55S36JBD100-pinctrl.h4382 #define DMA0_TRIG011_PIO1_5 IOCON_MUX(37, IOCON_TYPE_A, 0) /* PIO1_5 */ macro