Searched refs:DEV_ASSERT_QSPI (Results 1 – 4 of 4) sorted by relevance
218 DEV_ASSERT_QSPI(vLutIdx < state->configuration->lutSequences.opCount); in Qspi_Ip_InitLutSeq()224 DEV_ASSERT_QSPI(vLutIdx < state->configuration->lutSequences.opCount); in Qspi_Ip_InitLutSeq()229 DEV_ASSERT_QSPI(lutIdx < FEATURE_QSPI_LUT_SEQUENCE_SIZE); in Qspi_Ip_InitLutSeq()975 DEV_ASSERT_QSPI(instance < QSPI_IP_MEM_INSTANCE_COUNT); in Qspi_Ip_RunCommand()976 DEV_ASSERT_QSPI(lut != QSPI_IP_LUT_INVALID); in Qspi_Ip_RunCommand()977 DEV_ASSERT_QSPI(addr < state->configuration->memSize); in Qspi_Ip_RunCommand()1011 DEV_ASSERT_QSPI(instance < QSPI_IP_MEM_INSTANCE_COUNT); in Qspi_Ip_RunReadCommand()1012 DEV_ASSERT_QSPI(lut != QSPI_IP_LUT_INVALID); in Qspi_Ip_RunReadCommand()1013 DEV_ASSERT_QSPI(addr < state->configuration->memSize); in Qspi_Ip_RunReadCommand()1014 DEV_ASSERT_QSPI((size > 0UL) && ((addr + size) <= state->configuration->memSize)); in Qspi_Ip_RunReadCommand()[all …]
1050 DEV_ASSERT_QSPI(instance < QuadSPI_INSTANCE_COUNT); in Qspi_Ip_AhbSetup()1051 DEV_ASSERT_QSPI(0U == (config->sizes[0U] & 7U)); in Qspi_Ip_AhbSetup()1052 DEV_ASSERT_QSPI(((uint32)config->sizes[0U] + in Qspi_Ip_AhbSetup()1205 DEV_ASSERT_QSPI(instance < QuadSPI_INSTANCE_COUNT); in Qspi_Ip_SetLut()1206 DEV_ASSERT_QSPI(LutRegister < QuadSPI_LUT_COUNT); in Qspi_Ip_SetLut()1224 DEV_ASSERT_QSPI(Instance < QuadSPI_INSTANCE_COUNT); in Qspi_Ip_WriteLuts_Privileged()1225 DEV_ASSERT_QSPI(StartLutRegister < QuadSPI_LUT_COUNT); in Qspi_Ip_WriteLuts_Privileged()1226 DEV_ASSERT_QSPI(Size <= FEATURE_QSPI_LUT_SEQUENCE_SIZE); in Qspi_Ip_WriteLuts_Privileged()1227 DEV_ASSERT_QSPI((StartLutRegister + Size) <= QuadSPI_LUT_COUNT); in Qspi_Ip_WriteLuts_Privileged()1251 DEV_ASSERT_QSPI(instance < QuadSPI_INSTANCE_COUNT); in Qspi_Ip_SetAhbSeqId_Privileged()[all …]
3974 DEV_ASSERT_QSPI(pConnect != NULL_PTR); in Qspi_Ip_ReadSfdp()3975 DEV_ASSERT_QSPI(pConfig != NULL_PTR); in Qspi_Ip_ReadSfdp()3976 …DEV_ASSERT_QSPI((pConfig->lutSequences.lutOps != NULL_PTR) && (pConfig->lutSequences.opCount > 0U)… in Qspi_Ip_ReadSfdp()
75 #define DEV_ASSERT_QSPI(x) macro
