ConfiguredCoreClock (reference) in projects: hal_nxp-3.5.0

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Searched refs:ConfiguredCoreClock (Results 1 – 1 of 1) sorted by relevance

/hal_nxp-3.5.0/s32/drivers/s32k3/Mcu/src/
D	Clock_Ip_Specific.c	377 uint32 ConfiguredCoreClock = 0U; in Clock_Ip_CodeInRamSetFlashWaitStates() local 379 …ConfiguredCoreClock = (*Clock_Ip_pxConfig->ConfiguredFrequencies)[Clock_Ip_FreqIds[CORE_CLK]].Conf… in Clock_Ip_CodeInRamSetFlashWaitStates() 381 if (ConfiguredCoreClock <= 167000000U) in Clock_Ip_CodeInRamSetFlashWaitStates() 383 if (ConfiguredCoreClock <= 66000000U) in Clock_Ip_CodeInRamSetFlashWaitStates() 387 else if (ConfiguredCoreClock <= 100000000U) in Clock_Ip_CodeInRamSetFlashWaitStates() 391 else if (ConfiguredCoreClock <= 133000000U) in Clock_Ip_CodeInRamSetFlashWaitStates() 402 if (ConfiguredCoreClock <= 200000000U) in Clock_Ip_CodeInRamSetFlashWaitStates() 406 else if (ConfiguredCoreClock <= 233000000U) in Clock_Ip_CodeInRamSetFlashWaitStates() 410 else if (ConfiguredCoreClock <= 250000000U) in Clock_Ip_CodeInRamSetFlashWaitStates()

TraceRecorderSource-2.7.6
TraceRecorderSource-3.4.0
Zephyr-Core-2.7.6
Zephyr-Core-3.4.0
Zephyr-Core-3.5.0
Zephyr-Core-3.6.0
Zephyr-Core-3.7.0
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babblesim_ext_2G4_channel_multiatt-3.4.0
babblesim_ext_2G4_channel_multiatt-3.7.0-3.6.0-3.5.0
babblesim_ext_2G4_device_WLAN_actmod-3.7.0-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_device_burst_interferer-3.7.0-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_device_playback-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_device_playback-3.7.0
babblesim_ext_2G4_libPhyComv1-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_libPhyComv1-3.7.0
babblesim_ext_2G4_modem_BLE_simple-3.4.0
babblesim_ext_2G4_modem_BLE_simple-3.6.0-3.5.0
babblesim_ext_2G4_modem_BLE_simple-3.7.0
babblesim_ext_2G4_modem_magic-3.6.0-3.5.0-3.4.0
babblesim_ext_2G4_modem_magic-3.7.0
babblesim_ext_2G4_phy_v1-3.4.0
babblesim_ext_2G4_phy_v1-3.6.0-3.5.0
babblesim_ext_2G4_phy_v1-3.7.0
babblesim_ext_libCryptov1-3.7.0-3.6.0-3.5.0-3.4.0
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cmsis-2.7.6
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cmsis-3.5.0
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cmsis-nn-3.6.0-3.5.0
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edtt-2.7.6
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edtt-3.7.0
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