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Searched refs:CTIMER_EMR_EM3_MASK (Results 1 – 25 of 54) sorted by relevance

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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC802/
DLPC802.h1474 #define CTIMER_EMR_EM3_MASK (0x8U) macro
1481 … (((uint32_t)(((uint32_t)(x)) << CTIMER_EMR_EM3_SHIFT)) & CTIMER_EMR_EM3_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC804/
DLPC804.h1856 #define CTIMER_EMR_EM3_MASK (0x8U) macro
1863 … (((uint32_t)(((uint32_t)(x)) << CTIMER_EMR_EM3_SHIFT)) & CTIMER_EMR_EM3_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC844/
DLPC844.h1575 #define CTIMER_EMR_EM3_MASK (0x8U) macro
1582 … (((uint32_t)(((uint32_t)(x)) << CTIMER_EMR_EM3_SHIFT)) & CTIMER_EMR_EM3_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC845/
DLPC845.h1981 #define CTIMER_EMR_EM3_MASK (0x8U) macro
1988 … (((uint32_t)(((uint32_t)(x)) << CTIMER_EMR_EM3_SHIFT)) & CTIMER_EMR_EM3_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC51U68/
DLPC51U68.h1583 #define CTIMER_EMR_EM3_MASK (0x8U) macro
1590 … (((uint32_t)(((uint32_t)(x)) << CTIMER_EMR_EM3_SHIFT)) & CTIMER_EMR_EM3_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC54114/
DLPC54114_cm0plus.h1539 #define CTIMER_EMR_EM3_MASK (0x8U) macro
1546 … (((uint32_t)(((uint32_t)(x)) << CTIMER_EMR_EM3_SHIFT)) & CTIMER_EMR_EM3_MASK)
DLPC54114_cm4.h1550 #define CTIMER_EMR_EM3_MASK (0x8U) macro
1557 … (((uint32_t)(((uint32_t)(x)) << CTIMER_EMR_EM3_SHIFT)) & CTIMER_EMR_EM3_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC54113/
DLPC54113.h1551 #define CTIMER_EMR_EM3_MASK (0x8U) macro
1558 … (((uint32_t)(((uint32_t)(x)) << CTIMER_EMR_EM3_SHIFT)) & CTIMER_EMR_EM3_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC54005/
DLPC54005.h1824 #define CTIMER_EMR_EM3_MASK (0x8U) macro
1831 … (((uint32_t)(((uint32_t)(x)) << CTIMER_EMR_EM3_SHIFT)) & CTIMER_EMR_EM3_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC54607/
DLPC54607.h1825 #define CTIMER_EMR_EM3_MASK (0x8U) macro
1832 … (((uint32_t)(((uint32_t)(x)) << CTIMER_EMR_EM3_SHIFT)) & CTIMER_EMR_EM3_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC54605/
DLPC54605.h1828 #define CTIMER_EMR_EM3_MASK (0x8U) macro
1835 … (((uint32_t)(((uint32_t)(x)) << CTIMER_EMR_EM3_SHIFT)) & CTIMER_EMR_EM3_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC54S005/
DLPC54S005.h2232 #define CTIMER_EMR_EM3_MASK (0x8U) macro
2239 … (((uint32_t)(((uint32_t)(x)) << CTIMER_EMR_EM3_SHIFT)) & CTIMER_EMR_EM3_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC54616/
DLPC54616.h3369 #define CTIMER_EMR_EM3_MASK (0x8U) macro
3376 … (((uint32_t)(((uint32_t)(x)) << CTIMER_EMR_EM3_SHIFT)) & CTIMER_EMR_EM3_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC54016/
DLPC54016.h3070 #define CTIMER_EMR_EM3_MASK (0x8U) macro
3077 … (((uint32_t)(((uint32_t)(x)) << CTIMER_EMR_EM3_SHIFT)) & CTIMER_EMR_EM3_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC54606/
DLPC54606.h3294 #define CTIMER_EMR_EM3_MASK (0x8U) macro
3301 … (((uint32_t)(((uint32_t)(x)) << CTIMER_EMR_EM3_SHIFT)) & CTIMER_EMR_EM3_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC54618/
DLPC54618.h3367 #define CTIMER_EMR_EM3_MASK (0x8U) macro
3374 … (((uint32_t)(((uint32_t)(x)) << CTIMER_EMR_EM3_SHIFT)) & CTIMER_EMR_EM3_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC54018M/
DLPC54018M.h3367 #define CTIMER_EMR_EM3_MASK (0x8U) macro
3374 … (((uint32_t)(((uint32_t)(x)) << CTIMER_EMR_EM3_SHIFT)) & CTIMER_EMR_EM3_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC54018/
DLPC54018.h3367 #define CTIMER_EMR_EM3_MASK (0x8U) macro
3374 … (((uint32_t)(((uint32_t)(x)) << CTIMER_EMR_EM3_SHIFT)) & CTIMER_EMR_EM3_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5506CPXXXX/
DLPC5506CPXXXX.h6669 #define CTIMER_EMR_EM3_MASK (0x8U) macro
6676 … (((uint32_t)(((uint32_t)(x)) << CTIMER_EMR_EM3_SHIFT)) & CTIMER_EMR_EM3_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC54608/
DLPC54608.h3290 #define CTIMER_EMR_EM3_MASK (0x8U) macro
3297 … (((uint32_t)(((uint32_t)(x)) << CTIMER_EMR_EM3_SHIFT)) & CTIMER_EMR_EM3_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC54S018M/
DLPC54S018M.h3775 #define CTIMER_EMR_EM3_MASK (0x8U) macro
3782 … (((uint32_t)(((uint32_t)(x)) << CTIMER_EMR_EM3_SHIFT)) & CTIMER_EMR_EM3_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC54S016/
DLPC54S016.h3435 #define CTIMER_EMR_EM3_MASK (0x8U) macro
3442 … (((uint32_t)(((uint32_t)(x)) << CTIMER_EMR_EM3_SHIFT)) & CTIMER_EMR_EM3_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC54628/
DLPC54628.h3365 #define CTIMER_EMR_EM3_MASK (0x8U) macro
3372 … (((uint32_t)(((uint32_t)(x)) << CTIMER_EMR_EM3_SHIFT)) & CTIMER_EMR_EM3_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC54S018/
DLPC54S018.h3775 #define CTIMER_EMR_EM3_MASK (0x8U) macro
3782 … (((uint32_t)(((uint32_t)(x)) << CTIMER_EMR_EM3_SHIFT)) & CTIMER_EMR_EM3_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/LPC5502/
DLPC5502.h6714 #define CTIMER_EMR_EM3_MASK (0x8U) macro
6721 … (((uint32_t)(((uint32_t)(x)) << CTIMER_EMR_EM3_SHIFT)) & CTIMER_EMR_EM3_MASK)

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